Lines Matching refs:ret

144 	int ret;
146 ret = regmap_write(data->regmap, BMG160_REG_PMU_LPW, mode);
147 if (ret < 0) {
149 return ret;
170 int ret;
177 ret = regmap_write(data->regmap, BMG160_REG_PMU_BW, bw_bits);
178 if (ret < 0) {
180 return ret;
189 int ret;
193 ret = regmap_read(data->regmap, BMG160_REG_PMU_BW, &bw_bits);
194 if (ret < 0) {
196 return ret;
209 return ret ? ret : IIO_VAL_INT;
216 int ret;
224 ret = regmap_write(data->regmap, BMG160_REG_PMU_BW,
226 if (ret < 0) {
228 return ret;
237 int ret;
248 ret = regmap_read(data->regmap, BMG160_REG_CHIP_ID, &val);
249 if (ret < 0) {
251 return ret;
260 ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
261 if (ret < 0)
262 return ret;
268 ret = bmg160_set_bw(data, BMG160_DEF_BW);
269 if (ret < 0)
270 return ret;
273 ret = regmap_write(data->regmap, BMG160_REG_RANGE, BMG160_RANGE_500DPS);
274 if (ret < 0) {
276 return ret;
280 ret = regmap_read(data->regmap, BMG160_REG_SLOPE_THRES, &val);
281 if (ret < 0) {
283 return ret;
288 ret = regmap_update_bits(data->regmap, BMG160_REG_INT_EN_1,
290 if (ret < 0) {
292 return ret;
295 ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
298 if (ret < 0) {
301 return ret;
311 int ret;
314 ret = pm_runtime_get_sync(dev);
317 ret = pm_runtime_put_autosuspend(dev);
320 if (ret < 0) {
326 return ret;
337 int ret;
340 ret = regmap_update_bits(data->regmap, BMG160_REG_INT_MAP_0,
343 if (ret < 0) {
345 return ret;
351 ret = regmap_write(data->regmap, BMG160_REG_SLOPE_THRES,
353 if (ret < 0) {
355 return ret;
358 ret = regmap_write(data->regmap, BMG160_REG_MOTION_INTR,
361 if (ret < 0) {
363 return ret;
372 ret = regmap_write(data->regmap,
376 if (ret < 0) {
378 return ret;
382 ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0,
386 ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0, 0);
389 if (ret < 0) {
391 return ret;
401 int ret;
404 ret = regmap_update_bits(data->regmap, BMG160_REG_INT_MAP_1,
407 if (ret < 0) {
409 return ret;
413 ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
416 if (ret < 0) {
418 return ret;
421 ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0,
426 ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
429 if (ret < 0) {
431 return ret;
434 ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0, 0);
437 if (ret < 0) {
439 return ret;
450 int ret;
452 ret = regmap_read(data->regmap, BMG160_REG_PMU_BW, &bw_bits);
453 if (ret < 0) {
455 return ret;
474 int ret, i;
478 ret = regmap_write(data->regmap, BMG160_REG_RANGE,
480 if (ret < 0) {
482 return ret;
495 int ret;
499 ret = bmg160_set_power_state(data, true);
500 if (ret < 0) {
502 return ret;
505 ret = regmap_read(data->regmap, BMG160_REG_TEMP, &raw_val);
506 if (ret < 0) {
510 return ret;
514 ret = bmg160_set_power_state(data, false);
516 if (ret < 0)
517 return ret;
525 int ret;
529 ret = bmg160_set_power_state(data, true);
530 if (ret < 0) {
532 return ret;
535 ret = regmap_bulk_read(data->regmap, BMG160_AXIS_TO_REG(axis), &raw_val,
537 if (ret < 0) {
541 return ret;
545 ret = bmg160_set_power_state(data, false);
547 if (ret < 0)
548 return ret;
558 int ret;
607 ret = bmg160_get_bw(data, val);
609 return ret;
620 int ret;
632 ret = bmg160_set_power_state(data, true);
633 if (ret < 0) {
635 return ret;
637 ret = bmg160_set_bw(data, val);
638 if (ret < 0) {
641 return ret;
643 ret = bmg160_set_power_state(data, false);
645 return ret;
651 ret = bmg160_set_power_state(data, true);
652 if (ret < 0) {
655 return ret;
657 ret = bmg160_set_filter(data, val);
658 if (ret < 0) {
661 return ret;
663 ret = bmg160_set_power_state(data, false);
665 return ret;
672 ret = bmg160_set_power_state(data, true);
673 if (ret < 0) {
675 return ret;
677 ret = bmg160_set_scale(data, val2);
678 if (ret < 0) {
681 return ret;
683 ret = bmg160_set_power_state(data, false);
685 return ret;
755 int ret;
776 ret = bmg160_set_power_state(data, state);
777 if (ret < 0) {
779 return ret;
782 ret = bmg160_setup_any_motion_interrupt(data, state);
783 if (ret < 0) {
786 return ret;
884 int ret;
887 ret = regmap_bulk_read(data->regmap, BMG160_REG_XOUT_L,
890 if (ret < 0)
906 int ret;
913 ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
916 if (ret < 0)
925 int ret;
939 ret = bmg160_set_power_state(data, state);
940 if (ret < 0) {
942 return ret;
945 ret = bmg160_setup_any_motion_interrupt(data, state);
947 ret = bmg160_setup_new_data_interrupt(data, state);
948 if (ret < 0) {
951 return ret;
973 int ret;
977 ret = regmap_read(data->regmap, BMG160_REG_INT_STATUS_2, &val);
978 if (ret < 0) {
1012 ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH,
1015 if (ret < 0)
1075 int ret;
1086 ret = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulators),
1088 if (ret)
1089 return dev_err_probe(dev, ret, "Failed to get regulators\n");
1091 ret = iio_read_mount_matrix(dev, &data->orientation);
1092 if (ret)
1093 return ret;
1095 ret = bmg160_chip_init(data);
1096 if (ret < 0)
1097 return ret;
1112 ret = devm_request_threaded_irq(dev,
1119 if (ret)
1120 return ret;
1138 ret = iio_trigger_register(data->dready_trig);
1139 if (ret)
1140 return ret;
1144 ret = iio_trigger_register(data->motion_trig);
1145 if (ret) {
1151 ret = iio_triggered_buffer_setup(indio_dev,
1155 if (ret < 0) {
1161 ret = pm_runtime_set_active(dev);
1162 if (ret)
1170 ret = iio_device_register(indio_dev);
1171 if (ret < 0) {
1189 return ret;
1250 int ret;
1252 ret = bmg160_set_mode(data, BMG160_MODE_SUSPEND);
1253 if (ret < 0) {
1265 int ret;
1267 ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
1268 if (ret < 0)
1269 return ret;