iio/dac/adi-axi-dac.c

87 	struct axi_dac_state *st = iio_backend_get_priv(back);
91 	guard(mutex)(&st->lock);
92 	ret = regmap_set_bits(st->regmap, AXI_DAC_REG_RSTN,
101 	ret = regmap_read_poll_timeout(st->regmap, AXI_DAC_DRP_STATUS, __val,
106 	return regmap_set_bits(st->regmap, AXI_DAC_REG_RSTN,
112 	struct axi_dac_state *st = iio_backend_get_priv(back);
114 	guard(mutex)(&st->lock);
115 	regmap_write(st->regmap, AXI_DAC_REG_RSTN, 0);
121 	struct axi_dac_state *st = iio_backend_get_priv(back);
124 	if (device_property_read_string(st->dev, "dma-names", &dma_name))
127 	return iio_dmaengine_buffer_setup_ext(st->dev, indio_dev, dma_name,
146 static int __axi_dac_frequency_get(struct axi_dac_state *st, unsigned int chan,
152 	if (!st->dac_clk) {
153 		dev_err(st->dev, "Sampling rate is 0...\n");
162 	ret = regmap_read(st->regmap, reg, &raw);
167 	*freq = DIV_ROUND_CLOSEST_ULL(raw * st->dac_clk, BIT(16));
172 static int axi_dac_frequency_get(struct axi_dac_state *st,
179 	scoped_guard(mutex, &st->lock) {
180 		ret = __axi_dac_frequency_get(st, chan->channel, tone_2, &freq);
188 static int axi_dac_scale_get(struct axi_dac_state *st,
201 	ret = regmap_read(st->regmap, reg, &raw);
222 static int axi_dac_phase_get(struct axi_dac_state *st,
234 	ret = regmap_read(st->regmap, reg, &raw);
248 static int __axi_dac_frequency_set(struct axi_dac_state *st, unsigned int chan,
257 		dev_err(st->dev, "Invalid frequency(%u) dac_clk(%llu)\n",
269 	ret = regmap_update_bits(st->regmap,  reg, AXI_DAC_FREQUENCY, raw);
274 	return regmap_set_bits(st->regmap, AXI_DAC_REG_CNTRL_1, AXI_DAC_SYNC);
277 static int axi_dac_frequency_set(struct axi_dac_state *st,
288 	guard(mutex)(&st->lock);
289 	ret = __axi_dac_frequency_set(st, chan->channel, st->dac_clk, freq,
297 static int axi_dac_scale_set(struct axi_dac_state *st,
326 	guard(mutex)(&st->lock);
327 	ret = regmap_write(st->regmap, reg, raw);
332 	ret = regmap_set_bits(st->regmap, AXI_DAC_REG_CNTRL_1, AXI_DAC_SYNC);
339 static int axi_dac_phase_set(struct axi_dac_state *st,
362 	guard(mutex)(&st->lock);
363 	ret = regmap_update_bits(st->regmap, reg, AXI_DAC_PHASE,
369 	ret = regmap_set_bits(st->regmap, AXI_DAC_REG_CNTRL_1, AXI_DAC_SYNC);
380 	struct axi_dac_state *st = iio_backend_get_priv(back);
385 		return axi_dac_frequency_set(st, chan, buf, len,
389 		return axi_dac_scale_set(st, chan, buf, len,
393 		return axi_dac_phase_set(st, chan, buf, len,
403 	struct axi_dac_state *st = iio_backend_get_priv(back);
408 		return axi_dac_frequency_get(st, chan, buf,
412 		return axi_dac_scale_get(st, chan, buf,
416 		return axi_dac_phase_get(st, chan, buf,
436 	struct axi_dac_state *st = iio_backend_get_priv(back);
440 	if (st->reg_config & AXI_DDS_DISABLE)
452 	struct axi_dac_state *st = iio_backend_get_priv(back);
456 		return regmap_update_bits(st->regmap,
461 		return regmap_update_bits(st->regmap,
472 	struct axi_dac_state *st = iio_backend_get_priv(back);
478 	if (st->reg_config & AXI_DDS_DISABLE)
482 	guard(mutex)(&st->lock);
490 	if (!st->dac_clk) {
491 		st->dac_clk = sample_rate;
496 		ret = __axi_dac_frequency_get(st, chan, tone, &freq);
500 		ret = __axi_dac_frequency_set(st, chan, sample_rate, tone, freq);
505 	st->dac_clk = sample_rate;
532 	struct axi_dac_state *st;
538 	st = devm_kzalloc(&pdev->dev, sizeof(*st), GFP_KERNEL);
539 	if (!st)
554 	st->dev = &pdev->dev;
555 	st->regmap = devm_regmap_init_mmio(&pdev->dev, base,
557 	if (IS_ERR(st->regmap))
558 		return PTR_ERR(st->regmap);
564 	ret = regmap_write(st->regmap, AXI_DAC_REG_RSTN, 0);
568 	ret = regmap_read(st->regmap, ADI_AXI_REG_VERSION, &ver);
585 	ret = regmap_read(st->regmap, AXI_DAC_REG_CONFIG, &st->reg_config);
597 	ret = regmap_set_bits(st->regmap, AXI_DAC_REG_CNTRL_2, ADI_DAC_R1_MODE);
601 	mutex_init(&st->lock);
602 	ret = devm_iio_backend_register(&pdev->dev, &axi_dac_generic, st);