iio/dac/ad5758.c

186 static int ad5758_spi_reg_read(struct ad5758_state *st, unsigned int addr)
190 			.tx_buf = &st->d32[0],
194 			.tx_buf = &st->d32[1],
195 			.rx_buf = &st->d32[2],
201 	st->d32[0] = cpu_to_be32(
204 	st->d32[1] = cpu_to_be32(AD5758_WR_FLAG_MSK(AD5758_NOP) << 24);
206 	ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
210 	return (be32_to_cpu(st->d32[2]) >> 8) & 0xFFFF;
213 static int ad5758_spi_reg_write(struct ad5758_state *st,
217 	st->d32[0] = cpu_to_be32((AD5758_WR_FLAG_MSK(addr) << 24) |
220 	return spi_write(st->spi, &st->d32[0], sizeof(st->d32[0]));
223 static int ad5758_spi_write_mask(struct ad5758_state *st,
230 	regval = ad5758_spi_reg_read(st, addr);
237 	return ad5758_spi_reg_write(st, addr, regval);
258 static int ad5758_wait_for_task_complete(struct ad5758_state *st,
267 		ret = ad5758_spi_reg_read(st, reg);
277 	dev_err(&st->spi->dev,
283 static int ad5758_calib_mem_refresh(struct ad5758_state *st)
287 	ret = ad5758_spi_reg_write(st, AD5758_KEY,
290 		dev_err(&st->spi->dev,
296 	return ad5758_wait_for_task_complete(st, AD5758_DIGITAL_DIAG_RESULTS,
300 static int ad5758_soft_reset(struct ad5758_state *st)
304 	ret = ad5758_spi_reg_write(st, AD5758_KEY, AD5758_KEY_CODE_RESET_1);
308 	ret = ad5758_spi_reg_write(st, AD5758_KEY, AD5758_KEY_CODE_RESET_2);
316 static int ad5758_set_dc_dc_conv_mode(struct ad5758_state *st,
326 		ret  = ad5758_spi_write_mask(st, AD5758_ADC_CONFIG,
333 	ret = ad5758_spi_write_mask(st, AD5758_DCDC_CONFIG1,
343 	ret = ad5758_wait_for_task_complete(st, AD5758_DCDC_CONFIG2,
348 	st->dc_dc_mode = mode;
353 static int ad5758_set_dc_dc_ilim(struct ad5758_state *st, unsigned int ilim)
357 	ret = ad5758_spi_write_mask(st, AD5758_DCDC_CONFIG2,
366 	return ad5758_wait_for_task_complete(st, AD5758_DCDC_CONFIG2,
370 static int ad5758_slew_rate_set(struct ad5758_state *st,
385 	ret = ad5758_spi_write_mask(st, AD5758_DAC_CONFIG, mask, mode);
390 	return ad5758_wait_for_task_complete(st, AD5758_DIGITAL_DIAG_RESULTS,
394 static int ad5758_slew_rate_config(struct ad5758_state *st)
419 		do_div(sr_step, st->slew_time);
436 		diff_new = abs(st->slew_time - calc_slew_time);
444 	return ad5758_slew_rate_set(st, sr_clk_idx, sr_step_idx);
447 static int ad5758_set_out_range(struct ad5758_state *st, int range)
451 	ret = ad5758_spi_write_mask(st, AD5758_DAC_CONFIG,
458 	return ad5758_wait_for_task_complete(st, AD5758_DIGITAL_DIAG_RESULTS,
462 static int ad5758_internal_buffers_en(struct ad5758_state *st, bool enable)
466 	ret = ad5758_spi_write_mask(st, AD5758_DAC_CONFIG,
473 	return ad5758_wait_for_task_complete(st, AD5758_DIGITAL_DIAG_RESULTS,
477 static int ad5758_reset(struct ad5758_state *st)
479 	if (st->gpio_reset) {
480 		gpiod_set_value(st->gpio_reset, 0);
482 		gpiod_set_value(st->gpio_reset, 1);
488 		return ad5758_soft_reset(st);
497 	struct ad5758_state *st = iio_priv(indio_dev);
500 	mutex_lock(&st->lock);
502 		ret = ad5758_spi_reg_read(st, reg);
504 			mutex_unlock(&st->lock);
511 		ret = ad5758_spi_reg_write(st, reg, writeval);
513 	mutex_unlock(&st->lock);
522 	struct ad5758_state *st = iio_priv(indio_dev);
527 		mutex_lock(&st->lock);
528 		ret = ad5758_spi_reg_read(st, AD5758_DAC_INPUT);
529 		mutex_unlock(&st->lock);
536 		min = st->out_range.min;
537 		max = st->out_range.max;
542 		min = st->out_range.min;
543 		max = st->out_range.max;
555 	struct ad5758_state *st = iio_priv(indio_dev);
560 		mutex_lock(&st->lock);
561 		ret = ad5758_spi_reg_write(st, AD5758_DAC_INPUT, val);
562 		mutex_unlock(&st->lock);
574 	struct ad5758_state *st = iio_priv(indio_dev);
576 	return sysfs_emit(buf, "%d\n", st->pwr_down);
584 	struct ad5758_state *st = iio_priv(indio_dev);
594 	mutex_lock(&st->lock);
605 	ret = ad5758_spi_write_mask(st, AD5758_DAC_CONFIG,
611 	st->pwr_down = pwr_down;
614 	mutex_unlock(&st->lock);
665 static int ad5758_crc_disable(struct ad5758_state *st)
670 	st->d32[0] = cpu_to_be32(mask);
672 	return spi_write(st->spi, &st->d32[0], 4);
675 static int ad5758_find_out_range(struct ad5758_state *st,
684 			st->out_range.reg = range[i].reg;
685 			st->out_range.min = range[i].min;
686 			st->out_range.max = range[i].max;
695 static int ad5758_parse_dt(struct ad5758_state *st)
701 	st->dc_dc_ilim = 0;
702 	ret = device_property_read_u32(&st->spi->dev,
705 		dev_dbg(&st->spi->dev,
712 			dev_dbg(&st->spi->dev, "dc-dc-ilim out of range\n");
714 			st->dc_dc_ilim = index - ad5758_dc_dc_ilim;
717 	ret = device_property_read_u32(&st->spi->dev, "adi,dc-dc-mode",
718 				       &st->dc_dc_mode);
720 		dev_err(&st->spi->dev, "Missing \"dc-dc-mode\" property\n");
724 	if (!ad5758_is_valid_mode(st->dc_dc_mode))
727 	if (st->dc_dc_mode == AD5758_DCDC_MODE_DPC_VOLTAGE) {
728 		ret = device_property_read_u32_array(&st->spi->dev,
732 			dev_err(&st->spi->dev,
739 		ret = device_property_read_u32_array(&st->spi->dev,
743 			dev_err(&st->spi->dev,
751 	ret = ad5758_find_out_range(st, range, size, tmparray[0], tmparray[1]);
753 		dev_err(&st->spi->dev, "range invalid\n");
757 	ret = device_property_read_u32(&st->spi->dev, "adi,slew-time-us", &tmp);
759 		dev_dbg(&st->spi->dev, "Missing \"slew-time-us\" property\n");
760 		st->slew_time = 0;
762 		st->slew_time = tmp;
768 static int ad5758_init(struct ad5758_state *st)
772 	st->gpio_reset = devm_gpiod_get_optional(&st->spi->dev, "reset",
774 	if (IS_ERR(st->gpio_reset))
775 		return PTR_ERR(st->gpio_reset);
778 	ret = ad5758_crc_disable(st);
783 	ret = ad5758_reset(st);
788 	ret = ad5758_crc_disable(st);
793 	ret = ad5758_calib_mem_refresh(st);
797 	regval = ad5758_spi_reg_read(st, AD5758_DIGITAL_DIAG_RESULTS);
802 	ret = ad5758_spi_reg_write(st, AD5758_DIGITAL_DIAG_RESULTS, regval);
807 	ret = ad5758_set_dc_dc_ilim(st, st->dc_dc_ilim);
812 	ret = ad5758_set_dc_dc_conv_mode(st, st->dc_dc_mode);
817 	ret = ad5758_set_out_range(st, st->out_range.reg);
822 	if (st->slew_time) {
823 		ret = ad5758_slew_rate_config(st);
829 	ret = ad5758_internal_buffers_en(st, 1);
834 	return ad5758_spi_write_mask(st, AD5758_DAC_CONFIG,
841 	struct ad5758_state *st;
845 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
849 	st = iio_priv(indio_dev);
852 	st->spi = spi;
854 	mutex_init(&st->lock);
861 	ret = ad5758_parse_dt(st);
865 	if (st->dc_dc_mode == AD5758_DCDC_MODE_DPC_VOLTAGE)
870 	ret = ad5758_init(st);
876 	return devm_iio_device_register(&st->spi->dev, indio_dev);