Lines Matching refs:adc

128 static int adc12138_mode_programming(struct adc12138 *adc, u8 mode,
132 .tx_buf = adc->tx_buf,
133 .rx_buf = adc->rx_buf,
139 if (adc->id != adc12138)
142 adc->tx_buf[0] = mode;
144 ret = spi_sync_transfer(adc->spi, &xfer, 1);
148 memcpy(rx_buf, adc->rx_buf, len);
153 static int adc12138_read_status(struct adc12138 *adc)
158 ret = adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS,
166 static int __adc12138_start_conv(struct adc12138 *adc,
175 return adc12138_mode_programming(adc, mode, data, len);
178 static int adc12138_start_conv(struct adc12138 *adc,
183 return __adc12138_start_conv(adc, channel, &trash, 1);
186 static int adc12138_start_and_read_conv(struct adc12138 *adc,
190 return __adc12138_start_conv(adc, channel, data, 2);
193 static int adc12138_read_conv_data(struct adc12138 *adc, __be16 *value)
196 return adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS,
200 static int adc12138_wait_eoc(struct adc12138 *adc, unsigned long timeout)
202 if (!wait_for_completion_timeout(&adc->complete, timeout))
208 static int adc12138_adc_conversion(struct adc12138 *adc,
214 reinit_completion(&adc->complete);
216 ret = adc12138_start_conv(adc, channel);
220 ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100));
224 return adc12138_read_conv_data(adc, value);
231 struct adc12138 *adc = iio_priv(iio);
237 mutex_lock(&adc->lock);
238 ret = adc12138_adc_conversion(adc, channel, &data);
239 mutex_unlock(&adc->lock);
248 ret = regulator_get_voltage(adc->vref_p);
253 if (!IS_ERR(adc->vref_n)) {
254 ret = regulator_get_voltage(adc->vref_n);
266 if (!IS_ERR(adc->vref_n)) {
267 *value = regulator_get_voltage(adc->vref_n);
287 static int adc12138_init(struct adc12138 *adc)
294 reinit_completion(&adc->complete);
296 ret = adc12138_mode_programming(adc, ADC12138_MODE_AUTO_CAL, &trash, 1);
301 status = adc12138_read_status(adc);
305 adc12138_wait_eoc(adc, msecs_to_jiffies(100));
307 status = adc12138_read_status(adc);
309 dev_warn(&adc->spi->dev,
315 switch (adc->acquisition_time) {
332 return adc12138_mode_programming(adc, mode, &trash, 1);
339 struct adc12138 *adc = iio_priv(indio_dev);
345 mutex_lock(&adc->lock);
352 reinit_completion(&adc->complete);
354 ret = adc12138_start_and_read_conv(adc, scan_chan,
355 i ? &adc->data[i - 1] : &trash);
357 dev_warn(&adc->spi->dev,
362 ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100));
364 dev_warn(&adc->spi->dev, "wait eoc timeout\n");
372 ret = adc12138_read_conv_data(adc, &adc->data[i - 1]);
374 dev_warn(&adc->spi->dev,
380 iio_push_to_buffers_with_timestamp(indio_dev, adc->data,
383 mutex_unlock(&adc->lock);
393 struct adc12138 *adc = iio_priv(indio_dev);
395 complete(&adc->complete);
403 struct adc12138 *adc;
406 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
410 adc = iio_priv(indio_dev);
411 adc->spi = spi;
412 adc->id = spi_get_device_id(spi)->driver_data;
413 mutex_init(&adc->lock);
414 init_completion(&adc->complete);
420 switch (adc->id) {
435 &adc->acquisition_time);
437 adc->acquisition_time = 10;
439 adc->cclk = devm_clk_get(&spi->dev, NULL);
440 if (IS_ERR(adc->cclk))
441 return PTR_ERR(adc->cclk);
443 adc->vref_p = devm_regulator_get(&spi->dev, "vref-p");
444 if (IS_ERR(adc->vref_p))
445 return PTR_ERR(adc->vref_p);
447 adc->vref_n = devm_regulator_get_optional(&spi->dev, "vref-n");
448 if (IS_ERR(adc->vref_n)) {
453 ret = PTR_ERR(adc->vref_n);
463 ret = clk_prepare_enable(adc->cclk);
467 ret = regulator_enable(adc->vref_p);
471 if (!IS_ERR(adc->vref_n)) {
472 ret = regulator_enable(adc->vref_n);
477 ret = adc12138_init(adc);
496 if (!IS_ERR(adc->vref_n))
497 regulator_disable(adc->vref_n);
499 regulator_disable(adc->vref_p);
501 clk_disable_unprepare(adc->cclk);
509 struct adc12138 *adc = iio_priv(indio_dev);
513 if (!IS_ERR(adc->vref_n))
514 regulator_disable(adc->vref_n);
515 regulator_disable(adc->vref_p);
516 clk_disable_unprepare(adc->cclk);