iio/adc/ad7887.c

83 	struct ad7887_state *st = iio_priv(indio_dev);
88 		st->ring_msg = &st->msg[AD7887_CH0];
91 		st->ring_msg = &st->msg[AD7887_CH1];
93 		spi_sync(st->spi, st->ring_msg);
96 		st->ring_msg = &st->msg[AD7887_CH0_CH1];
105 	struct ad7887_state *st = iio_priv(indio_dev);
108 	return spi_sync(st->spi, &st->msg[AD7887_CH0]);
115 	struct ad7887_state *st = iio_priv(indio_dev);
118 	b_sent = spi_sync(st->spi, st->ring_msg);
122 	iio_push_to_buffers_with_timestamp(indio_dev, st->data,
135 static int ad7887_scan_direct(struct ad7887_state *st, unsigned ch)
137 	int ret = spi_sync(st->spi, &st->msg[ch]);
141 	return (st->data[(ch * 2)] << 8) | st->data[(ch * 2) + 1];
151 	struct ad7887_state *st = iio_priv(indio_dev);
158 		ret = ad7887_scan_direct(st, chan->address);
167 		if (st->reg) {
168 			*val = regulator_get_voltage(st->reg);
173 			*val = st->chip_info->int_vref_mv;
238 	struct ad7887_state *st;
243 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
247 	st = iio_priv(indio_dev);
249 	st->reg = devm_regulator_get_optional(&spi->dev, "vref");
250 	if (IS_ERR(st->reg)) {
251 		if (PTR_ERR(st->reg) != -ENODEV)
252 			return PTR_ERR(st->reg);
254 		st->reg = NULL;
257 	if (st->reg) {
258 		ret = regulator_enable(st->reg);
262 		ret = devm_add_action_or_reset(&spi->dev, ad7887_reg_disable, st->reg);
267 	st->chip_info =
270 	st->spi = spi;
279 	if (!st->reg)
284 	st->tx_cmd_buf[0] = AD7887_CH_AIN0 | mode;
286 	st->xfer[0].rx_buf = &st->data[0];
287 	st->xfer[0].tx_buf = &st->tx_cmd_buf[0];
288 	st->xfer[0].len = 2;
290 	spi_message_init(&st->msg[AD7887_CH0]);
291 	spi_message_add_tail(&st->xfer[0], &st->msg[AD7887_CH0]);
294 		st->tx_cmd_buf[2] = AD7887_CH_AIN1 | mode;
296 		st->xfer[1].rx_buf = &st->data[0];
297 		st->xfer[1].tx_buf = &st->tx_cmd_buf[2];
298 		st->xfer[1].len = 2;
300 		st->xfer[2].rx_buf = &st->data[2];
301 		st->xfer[2].tx_buf = &st->tx_cmd_buf[0];
302 		st->xfer[2].len = 2;
304 		spi_message_init(&st->msg[AD7887_CH0_CH1]);
305 		spi_message_add_tail(&st->xfer[1], &st->msg[AD7887_CH0_CH1]);
306 		spi_message_add_tail(&st->xfer[2], &st->msg[AD7887_CH0_CH1]);
308 		st->xfer[3].rx_buf = &st->data[2];
309 		st->xfer[3].tx_buf = &st->tx_cmd_buf[2];
310 		st->xfer[3].len = 2;
312 		spi_message_init(&st->msg[AD7887_CH1]);
313 		spi_message_add_tail(&st->xfer[3], &st->msg[AD7887_CH1]);
315 		indio_dev->channels = st->chip_info->dual_channels;
316 		indio_dev->num_channels = st->chip_info->num_dual_channels;
318 		indio_dev->channels = st->chip_info->channels;
319 		indio_dev->num_channels = st->chip_info->num_channels;