iio/accel/mma8452.c

202 		int ret = i2c_smbus_read_byte_data(data->client,
204 		if (ret < 0)
205 			return ret;
206 		if ((ret & MMA8452_STATUS_DRDY) == MMA8452_STATUS_DRDY)
224 	int ret;
227 		ret = pm_runtime_resume_and_get(&client->dev);
230 		ret = pm_runtime_put_autosuspend(&client->dev);
233 	if (ret < 0) {
237 		return ret;
246 	int ret = mma8452_drdy(data);
248 	if (ret < 0)
249 		return ret;
251 	ret = mma8452_set_runtime_pm_state(data->client, true);
252 	if (ret)
253 		return ret;
255 	ret = i2c_smbus_read_i2c_block_data(data->client, MMA8452_OUT_X,
258 	ret = mma8452_set_runtime_pm_state(data->client, false);
260 	return ret;
471 	int j, i, ret;
473 	ret = i2c_smbus_read_byte_data(data->client, MMA8452_HP_FILTER_CUTOFF);
474 	if (ret < 0)
475 		return ret;
482 	ret &= MMA8452_HP_FILTER_CUTOFF_SEL_MASK;
483 	*hz = mma8452_hp_filter_cutoff[j][i][ret][0];
484 	*uHz = mma8452_hp_filter_cutoff[j][i][ret][1];
495 	int i, ret;
499 		ret = iio_device_claim_direct_mode(indio_dev);
500 		if (ret)
501 			return ret;
504 		ret = mma8452_read(data, buffer);
507 		if (ret < 0)
508 			return ret;
528 		ret = i2c_smbus_read_byte_data(data->client,
531 		if (ret < 0)
532 			return ret;
534 		*val = sign_extend32(ret, 7);
539 			ret = mma8452_read_hp_filter(data, val, val2);
540 			if (ret < 0)
541 				return ret;
549 		ret = mma8452_get_power_mode(data);
550 		if (ret < 0)
551 			return ret;
555 		*val = mma8452_os_ratio[ret][i];
564 	int ret, i = mma8452_get_odr_index(data);
567 		ret = 1000 / mma8452_samp_freq[i][0];
569 		ret = 1000;
571 	return ret == 0 ? 1 : ret;
600 	int ret;
607 		ret = is_active;
613 		ret = mma8452_standby(data);
614 		if (ret < 0)
618 	ret = i2c_smbus_write_byte_data(data->client, reg, val);
619 	if (ret < 0)
623 		ret = mma8452_active(data);
624 		if (ret < 0)
628 	ret = 0;
632 	return ret;
714 	int i, ret;
716 	ret = iio_device_claim_direct_mode(indio_dev);
717 	if (ret)
718 		return ret;
724 			ret = i;
732 		ret = mma8452_change_config(data, MMA8452_CTRL_REG1,
738 			ret = i;
745 		ret = mma8452_change_config(data, MMA8452_DATA_CFG,
750 			ret = -EINVAL;
754 		ret = mma8452_change_config(data,
764 			ret = mma8452_set_hp_filter_frequency(data, val, val2);
765 			if (ret < 0)
769 		ret = mma8452_change_config(data, MMA8452_DATA_CFG,
774 		ret = mma8452_get_odr_index(data);
777 			if (mma8452_os_ratio[i][ret] == val) {
778 				ret = mma8452_set_power_mode(data, i);
784 		ret = -EINVAL;
789 	return ret;
830 	int ret, us, power_mode;
833 	ret = mma8452_get_event_regs(data, chan, dir, &ev_regs);
834 	if (ret)
835 		return ret;
839 		ret = i2c_smbus_read_byte_data(data->client, ev_regs->ev_ths);
840 		if (ret < 0)
841 			return ret;
843 		*val = ret & ev_regs->ev_ths_mask;
848 		ret = i2c_smbus_read_byte_data(data->client, ev_regs->ev_count);
849 		if (ret < 0)
850 			return ret;
856 		us = ret * mma8452_time_step_us[power_mode][
864 		ret = i2c_smbus_read_byte_data(data->client,
866 		if (ret < 0)
867 			return ret;
869 		if (ret & MMA8452_TRANSIENT_CFG_HPF_BYP) {
873 			ret = mma8452_read_hp_filter(data, val, val2);
874 			if (ret < 0)
875 				return ret;
893 	int ret, reg, steps;
896 	ret = mma8452_get_event_regs(data, chan, dir, &ev_regs);
897 	if (ret)
898 		return ret;
908 		ret = mma8452_get_power_mode(data);
909 		if (ret < 0)
910 			return ret;
913 				mma8452_time_step_us[ret][
931 			ret = mma8452_set_hp_filter_frequency(data, val, val2);
932 			if (ret < 0)
933 				return ret;
949 	int ret;
952 	ret = mma8452_get_event_regs(data, chan, dir, &ev_regs);
953 	if (ret)
954 		return ret;
960 		ret = i2c_smbus_read_byte_data(data->client,
962 		if (ret < 0)
963 			return ret;
965 		return !!(ret & BIT(chan->scan_index +
979 	int val, ret;
982 	ret = mma8452_get_event_regs(data, chan, dir, &ev_regs);
983 	if (ret)
984 		return ret;
986 	ret = mma8452_set_runtime_pm_state(data->client, state);
987 	if (ret)
988 		return ret;
1059 	irqreturn_t ret = IRQ_NONE;
1071 		ret = IRQ_HANDLED;
1085 		ret = IRQ_HANDLED;
1090 		ret = IRQ_HANDLED;
1093 	return ret;
1101 	int ret;
1103 	ret = mma8452_read(data, data->buffer.channels);
1104 	if (ret < 0)
1120 	int ret;
1129 	ret = i2c_smbus_read_byte_data(data->client, reg);
1130 	if (ret < 0)
1131 		return ret;
1133 	*readval = ret;
1456 	int reg, ret;
1458 	ret = mma8452_set_runtime_pm_state(data->client, state);
1459 	if (ret)
1460 		return ret;
1483 	int ret;
1494 	ret = iio_trigger_register(trig);
1495 	if (ret)
1496 		return ret;
1512 	int ret;
1525 		ret = i2c_smbus_read_byte_data(client, MMA8452_CTRL_REG2);
1526 		if (ret == -EIO)
1528 		if (ret < 0)
1529 			return ret;
1530 		if (!(ret & MMA8452_CTRL_REG2_RST))
1552 	int ret;
1567 	ret = iio_read_mount_matrix(&client->dev, &data->orientation);
1568 	if (ret)
1569 		return ret;
1581 	ret = regulator_enable(data->vdd_reg);
1582 	if (ret) {
1584 		return ret;
1587 	ret = regulator_enable(data->vddio_reg);
1588 	if (ret) {
1593 	ret = i2c_smbus_read_byte_data(client, MMA8452_WHO_AM_I);
1594 	if (ret < 0)
1597 	switch (ret) {
1604 		if (ret == data->chip_info->chip_id)
1608 		ret = -ENODEV;
1623 	ret = mma8452_reset(client);
1624 	if (ret < 0)
1628 	ret = i2c_smbus_write_byte_data(client, MMA8452_DATA_CFG,
1630 	if (ret < 0)
1637 	ret = i2c_smbus_write_byte_data(client, MMA8452_TRANSIENT_THS,
1639 	if (ret < 0)
1650 			ret = i2c_smbus_write_byte_data(client,
1653 			if (ret < 0)
1659 		ret = i2c_smbus_write_byte_data(client,
1662 		if (ret < 0)
1665 		ret = mma8452_trigger_setup(indio_dev);
1666 		if (ret < 0)
1675 	ret = i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG1,
1677 	if (ret < 0)
1680 	ret = iio_triggered_buffer_setup(indio_dev, NULL,
1682 	if (ret < 0)
1686 		ret = devm_request_threaded_irq(&client->dev,
1691 		if (ret)
1695 	ret = pm_runtime_set_active(&client->dev);
1696 	if (ret < 0)
1704 	ret = iio_device_register(indio_dev);
1705 	if (ret < 0)
1708 	ret = mma8452_set_freefall_mode(data, false);
1709 	if (ret < 0)
1729 	return ret;
1755 	int ret;
1758 	ret = mma8452_standby(data);
1760 	if (ret < 0) {
1765 	ret = regulator_disable(data->vddio_reg);
1766 	if (ret) {
1768 		return ret;
1771 	ret = regulator_disable(data->vdd_reg);
1772 	if (ret) {
1774 		return ret;
1784 	int ret, sleep_val;
1786 	ret = regulator_enable(data->vdd_reg);
1787 	if (ret) {
1789 		return ret;
1792 	ret = regulator_enable(data->vddio_reg);
1793 	if (ret) {
1796 		return ret;
1799 	ret = mma8452_active(data);
1800 	if (ret < 0)
1803 	ret = mma8452_get_odr_index(data);
1804 	sleep_val = 1000 / mma8452_samp_freq[ret][0];
1816 	return ret;