Lines Matching refs:ret
275 int ret;
277 ret = regmap_update_bits(st->regmap, ADXL367_REG_POWER_CTL,
281 if (ret)
282 return ret;
311 int ret;
323 ret = regmap_bulk_write(st->regmap, reg, st->act_threshold_buf,
325 if (ret)
326 return ret;
340 int ret;
344 ret = adxl367_set_measure_en(st, false);
345 if (ret)
346 return ret;
348 ret = _adxl367_set_act_threshold(st, act, threshold);
349 if (ret)
350 return ret;
380 int ret;
382 ret = regmap_read(st->regmap, ADXL367_REG_INT1_MAP, &val);
383 if (ret)
384 return ret;
414 int ret;
416 ret = regmap_read(st->regmap, ADXL367_REG_FIFO_CTL, &val);
417 if (ret)
418 return ret;
448 int ret;
462 ret = regmap_update_bits(st->regmap, ADXL367_REG_FIFO_CTL,
464 if (ret)
465 return ret;
467 ret = regmap_update_bits(st->regmap, ADXL367_REG_FIFO_SAMPLES,
469 if (ret)
470 return ret;
482 int ret;
486 ret = adxl367_set_measure_en(st, false);
487 if (ret)
488 return ret;
490 ret = regmap_update_bits(st->regmap, ADXL367_REG_FILTER_CTL,
494 if (ret)
495 return ret;
500 ret = _adxl367_set_act_threshold(st, ADXL367_ACTIVITY,
502 if (ret)
503 return ret;
505 ret = _adxl367_set_act_threshold(st, ADXL367_INACTIVITY,
507 if (ret)
508 return ret;
510 ret = adxl367_set_measure_en(st, true);
511 if (ret)
512 return ret;
534 int ret;
539 ret = regmap_write(st->regmap, ADXL367_REG_TIME_ACT, val);
540 if (ret)
541 return ret;
551 int ret;
563 ret = regmap_bulk_write(st->regmap, ADXL367_REG_TIME_INACT_H,
565 if (ret)
566 return ret;
577 int ret;
581 ret = adxl367_set_measure_en(st, false);
582 if (ret)
583 return ret;
586 ret = _adxl367_set_act_time_ms(st, ms);
588 ret = _adxl367_set_inact_time_ms(st, ms);
590 if (ret)
591 return ret;
598 int ret;
600 ret = regmap_update_bits(st->regmap, ADXL367_REG_FILTER_CTL,
604 if (ret)
605 return ret;
608 ret = _adxl367_set_act_time_ms(st, st->act_time_ms);
609 if (ret)
610 return ret;
612 ret = _adxl367_set_inact_time_ms(st, st->inact_time_ms);
613 if (ret)
614 return ret;
625 int ret;
629 ret = adxl367_set_measure_en(st, false);
630 if (ret)
631 return ret;
633 ret = _adxl367_set_odr(st, odr);
634 if (ret)
635 return ret;
652 int ret;
656 ret = adxl367_set_temp_adc_en(st, ADXL367_REG_TEMP_CTL, en);
659 ret = adxl367_set_temp_adc_en(st, ADXL367_REG_ADC_CTL, en);
665 if (ret)
666 return ret;
731 int ret;
735 ret = adxl367_set_temp_adc_reg_en(st, chan->address, true);
736 if (ret)
737 return ret;
739 ret = regmap_bulk_read(st->regmap, chan->address, &st->sample_buf,
741 if (ret)
742 return ret;
747 ret = adxl367_set_temp_adc_reg_en(st, chan->address, false);
748 if (ret)
749 return ret;
759 int ret;
762 ret = regmap_bulk_read(st->regmap, ADXL367_REG_STATUS,
764 if (ret)
765 return ret;
798 int ret;
806 ret = st->ops->read_fifo(st->context, st->fifo_buf, fifo_entries);
807 if (ret) {
808 dev_err(st->dev, "Failed to read FIFO: %d\n", ret);
825 int ret;
827 ret = adxl367_get_status(st, &status, &fifo_entries);
828 if (ret)
905 int ret;
911 ret = adxl367_find_odr(st, val, val2, &odr);
912 if (ret)
913 return ret;
920 ret = adxl367_find_range(st, val, val2, &range);
921 if (ret)
922 return ret;
1058 int ret;
1062 ret = adxl367_get_act_interrupt_en(st, ADXL367_ACTIVITY, &en);
1063 return ret ?: en;
1065 ret = adxl367_get_act_interrupt_en(st, ADXL367_INACTIVITY, &en);
1066 return ret ?: en;
1093 int ret;
1097 ret = adxl367_set_measure_en(st, false);
1098 if (ret)
1099 return ret;
1101 ret = adxl367_set_act_interrupt_en(st, act, state);
1102 if (ret)
1103 return ret;
1105 ret = adxl367_set_act_en(st, act, state ? ADCL367_ACT_REF_ENABLED
1107 if (ret)
1108 return ret;
1121 int ret;
1123 ret = adxl367_get_fifo_mode(st, &fifo_mode);
1124 if (ret)
1125 return ret;
1162 int ret;
1169 ret = adxl367_set_measure_en(st, false);
1170 if (ret)
1171 return ret;
1173 ret = adxl367_set_fifo_watermark(st, val);
1174 if (ret)
1175 return ret;
1203 int ret;
1210 ret = adxl367_set_measure_en(st, false);
1211 if (ret)
1212 return ret;
1214 ret = adxl367_set_fifo_format(st, fifo_format);
1215 if (ret)
1216 return ret;
1218 ret = adxl367_set_measure_en(st, true);
1219 if (ret)
1220 return ret;
1231 int ret;
1235 ret = adxl367_set_temp_adc_mask_en(st, indio_dev->active_scan_mask,
1237 if (ret)
1238 return ret;
1240 ret = adxl367_set_measure_en(st, false);
1241 if (ret)
1242 return ret;
1244 ret = adxl367_set_fifo_watermark_interrupt_en(st, true);
1245 if (ret)
1246 return ret;
1248 ret = adxl367_set_fifo_mode(st, ADXL367_FIFO_MODE_STREAM);
1249 if (ret)
1250 return ret;
1258 int ret;
1262 ret = adxl367_set_measure_en(st, false);
1263 if (ret)
1264 return ret;
1266 ret = adxl367_set_fifo_mode(st, ADXL367_FIFO_MODE_DISABLED);
1267 if (ret)
1268 return ret;
1270 ret = adxl367_set_fifo_watermark_interrupt_en(st, false);
1271 if (ret)
1272 return ret;
1274 ret = adxl367_set_measure_en(st, true);
1275 if (ret)
1276 return ret;
1369 int ret;
1371 ret = regmap_read(st->regmap, ADXL367_REG_DEVID, &val);
1372 if (ret)
1373 return dev_err_probe(st->dev, ret, "Failed to read dev id\n");
1385 int ret;
1387 ret = _adxl367_set_act_threshold(st, ADXL367_ACTIVITY,
1389 if (ret)
1390 return ret;
1392 ret = _adxl367_set_act_threshold(st, ADXL367_INACTIVITY,
1394 if (ret)
1395 return ret;
1397 ret = adxl367_set_act_proc_mode(st, ADXL367_LOOPED);
1398 if (ret)
1399 return ret;
1401 ret = _adxl367_set_odr(st, ADXL367_ODR_400HZ);
1402 if (ret)
1403 return ret;
1405 ret = _adxl367_set_act_time_ms(st, 10);
1406 if (ret)
1407 return ret;
1409 ret = _adxl367_set_inact_time_ms(st, 10000);
1410 if (ret)
1411 return ret;
1422 int ret;
1443 ret = devm_regulator_bulk_get_enable(st->dev,
1446 if (ret)
1447 return dev_err_probe(st->dev, ret,
1450 ret = regmap_write(st->regmap, ADXL367_REG_RESET, ADXL367_RESET_CODE);
1451 if (ret)
1452 return ret;
1456 ret = adxl367_verify_devid(st);
1457 if (ret)
1458 return ret;
1460 ret = adxl367_setup(st);
1461 if (ret)
1462 return ret;
1464 ret = devm_iio_kfifo_buffer_setup_ext(st->dev, indio_dev,
1467 if (ret)
1468 return ret;
1470 ret = devm_request_threaded_irq(st->dev, irq, NULL,
1473 if (ret)
1474 return dev_err_probe(st->dev, ret, "Failed to request irq\n");