master/mipi-i3c-hci/pio.c

203 	/* Always accept error interrupts (will be activated on first xfer) */
227 static void hci_pio_write_cmd(struct i3c_hci *hci, struct hci_xfer *xfer)
229 	DBG("cmd_desc[%d] = 0x%08x", 0, xfer->cmd_desc[0]);
230 	DBG("cmd_desc[%d] = 0x%08x", 1, xfer->cmd_desc[1]);
231 	pio_reg_write(COMMAND_QUEUE_PORT, xfer->cmd_desc[0]);
232 	pio_reg_write(COMMAND_QUEUE_PORT, xfer->cmd_desc[1]);
234 		DBG("cmd_desc[%d] = 0x%08x", 2, xfer->cmd_desc[2]);
235 		DBG("cmd_desc[%d] = 0x%08x", 3, xfer->cmd_desc[3]);
236 		pio_reg_write(COMMAND_QUEUE_PORT, xfer->cmd_desc[2]);
237 		pio_reg_write(COMMAND_QUEUE_PORT, xfer->cmd_desc[3]);
243 	struct hci_xfer *xfer = pio->curr_rx;
247 	p = xfer->data;
248 	p += (xfer->data_len - xfer->data_left) / 4;
250 	while (xfer->data_left >= 4) {
254 		nr_words = min(xfer->data_left / 4, pio->rx_thresh_size);
256 		xfer->data_left -= nr_words * 4;
257 		DBG("now %d left %d", nr_words * 4, xfer->data_left);
263 	return !xfer->data_left;
269 	struct hci_xfer *xfer = pio->curr_rx;
274 	p = xfer->data;
275 	p += (xfer->data_len - xfer->data_left) / 4;
280 		xfer->data_left -= nr_words * 4;
281 		DBG("now %d left %d", nr_words * 4, xfer->data_left);
297 		xfer->data_word_before_partial = data;
298 		xfer->data_left -= count;
309 	struct hci_xfer *xfer = pio->curr_tx;
313 	p = xfer->data;
314 	p += (xfer->data_len - xfer->data_left) / 4;
316 	while (xfer->data_left >= 4) {
321 		nr_words = min(xfer->data_left / 4, pio->tx_thresh_size);
323 		xfer->data_left -= nr_words * 4;
324 		DBG("now %d left %d", nr_words * 4, xfer->data_left);
329 	if (xfer->data_left) {
339 		DBG("trailing %d", xfer->data_left);
341 		xfer->data_left = 0;
363 	struct hci_xfer *xfer = pio->curr_xfer;
366 	if (!xfer->data) {
367 		xfer->data_len = xfer->data_left = 0;
371 	if (xfer->rnw) {
373 		pio->rx_queue = xfer;
375 			prev_queue_tail->next_data = xfer;
377 			pio->curr_rx = xfer;
383 		pio->tx_queue = xfer;
385 			prev_queue_tail->next_data = xfer;
387 			pio->curr_tx = xfer;
394 static void hci_pio_push_to_next_rx(struct i3c_hci *hci, struct hci_xfer *xfer,
397 	u32 *from = xfer->data;
401 	received = (xfer->data_len - xfer->data_left) / 4;
402 	if ((xfer->data_len - xfer->data_left) & 3) {
403 		from_last = xfer->data_word_before_partial;
415 		xfer = xfer->next_data;
416 		if (!xfer) {
417 			dev_err(&hci->master.dev, "pushing RX data to unexistent xfer\n");
421 		room = DIV_ROUND_UP(xfer->data_len, 4);
422 		left = DIV_ROUND_UP(xfer->data_left, 4);
425 			hci_pio_push_to_next_rx(hci, xfer, chunk - left);
427 			xfer->data_left = left * 4;
430 		bytes_to_move = xfer->data_len - xfer->data_left;
433 			u32 *p = xfer->data;
435 			xfer->data_word_before_partial = p[bytes_to_move / 4];
437 		memmove(xfer->data + chunk, xfer->data, bytes_to_move);
442 		memcpy(xfer->data, from, chunk * 4);
443 		xfer->data_left -= chunk * 4;
448 		if (xfer->data_left < 4) {
454 			u8 *p_byte = xfer->data;
457 			xfer->data_word_before_partial = last_word;
459 			while (xfer->data_left--) {
464 			u32 *p = xfer->data;
467 			xfer->data_left -= 4;
480 		struct hci_xfer *xfer = pio->curr_resp;
485 		if (tid != xfer->cmd_tid) {
488 				tid, xfer->cmd_tid);
493 		xfer->response = resp;
495 		if (pio->curr_rx == xfer) {
503 			received = xfer->data_len - xfer->data_left;
504 			expected = RESP_DATA_LENGTH(xfer->response);
509 				/* we consumed data meant for next xfer */
511 				hci_pio_push_to_next_rx(hci, xfer, to_keep);
520 		 * We're about to give back ownership of the xfer structure
524 		if (pio->curr_rx == xfer) {
527 		} else if (pio->curr_tx == xfer) {
530 		} else if (xfer->data_left) {
531 			DBG("PIO xfer count = %d after response",
532 			    xfer->data_left);
535 		pio->curr_resp = xfer->next_resp;
536 		if (xfer->completion)
537 			complete(xfer->completion);
544 	struct hci_xfer *xfer = pio->curr_xfer;
547 	if (!(xfer->cmd_desc[0] & CMD_0_ROC))
551 	pio->resp_queue = xfer;
553 		prev_queue_tail->next_resp = xfer;
555 		pio->curr_resp = xfer;
588 static int hci_pio_queue_xfer(struct i3c_hci *hci, struct hci_xfer *xfer, int n)
596 	/* link xfer instances together and initialize data count */
598 		xfer[i].next_xfer = (i + 1 < n) ? &xfer[i + 1] : NULL;
599 		xfer[i].next_data = NULL;
600 		xfer[i].next_resp = NULL;
601 		xfer[i].data_left = xfer[i].data_len;
606 	pio->xfer_queue = &xfer[n - 1];
608 		prev_queue_tail->next_xfer = xfer;
610 		pio->curr_xfer = xfer;
623 					struct hci_xfer *xfer, int n)
636 			if (p == &xfer[i])
640 			if (p == &xfer[i])
644 			if (p == &xfer[i])
653 		if (p == &xfer[0]) {
654 			*p_prev_next = xfer[n - 1].next_xfer;
683 static bool hci_pio_dequeue_xfer(struct i3c_hci *hci, struct hci_xfer *xfer, int n)
694 	ret = hci_pio_dequeue_xfer_common(hci, pio, xfer, n);