master/mipi-i3c-hci/ext_caps.c

15 #include "hci.h"
24 static int hci_extcap_hardware_id(struct i3c_hci *hci, void __iomem *base)
26 	hci->vendor_mipi_id	= readl(base + 0x04);
27 	hci->vendor_version_id	= readl(base + 0x08);
28 	hci->vendor_product_id	= readl(base + 0x0c);
30 	dev_info(&hci->master.dev, "vendor MIPI ID: %#x\n", hci->vendor_mipi_id);
31 	dev_info(&hci->master.dev, "vendor version ID: %#x\n", hci->vendor_version_id);
32 	dev_info(&hci->master.dev, "vendor product ID: %#x\n", hci->vendor_product_id);
35 	switch (hci->vendor_mipi_id) {
37 		hci->quirks |= HCI_QUIRK_RAW_CCC;
45 static int hci_extcap_master_config(struct i3c_hci *hci, void __iomem *base)
52 	dev_info(&hci->master.dev, "operation mode: %s\n", functionality[operation_mode]);
55 	dev_err(&hci->master.dev, "only master mode is currently supported\n");
59 static int hci_extcap_multi_bus(struct i3c_hci *hci, void __iomem *base)
64 	dev_info(&hci->master.dev, "%d bus instances\n", count);
68 static int hci_extcap_xfer_modes(struct i3c_hci *hci, void __iomem *base)
74 	dev_info(&hci->master.dev, "transfer mode table has %d entries\n",
88 static int hci_extcap_xfer_rates(struct i3c_hci *hci, void __iomem *base)
97 	dev_info(&hci->master.dev, "available data rates:\n");
104 		dev_info(&hci->master.dev, "rate %d for %s = %d kHz\n",
116 static int hci_extcap_auto_command(struct i3c_hci *hci, void __iomem *base)
123 	dev_info(&hci->master.dev, "%d/%d active auto-command entries\n",
126 	hci->AUTOCMD_regs = base;
130 static int hci_extcap_debug(struct i3c_hci *hci, void __iomem *base)
132 	dev_info(&hci->master.dev, "debug registers present\n");
133 	hci->DEBUG_regs = base;
137 static int hci_extcap_scheduled_cmd(struct i3c_hci *hci, void __iomem *base)
139 	dev_info(&hci->master.dev, "scheduled commands available\n");
140 	/* hci->schedcmd_regs = base; */
144 static int hci_extcap_non_curr_master(struct i3c_hci *hci, void __iomem *base)
146 	dev_info(&hci->master.dev, "Non-Current Master support available\n");
147 	/* hci->NCM_regs = base; */
151 static int hci_extcap_ccc_resp_conf(struct i3c_hci *hci, void __iomem *base)
153 	dev_info(&hci->master.dev, "CCC Response Configuration available\n");
157 static int hci_extcap_global_DAT(struct i3c_hci *hci, void __iomem *base)
159 	dev_info(&hci->master.dev, "Global DAT available\n");
163 static int hci_extcap_multilane(struct i3c_hci *hci, void __iomem *base)
165 	dev_info(&hci->master.dev, "Master Multi-Lane support available\n");
169 static int hci_extcap_ncm_multilane(struct i3c_hci *hci, void __iomem *base)
171 	dev_info(&hci->master.dev, "NCM Multi-Lane support available\n");
178 	int (*parser)(struct i3c_hci *hci, void __iomem *base);
201 static int hci_extcap_vendor_NXP(struct i3c_hci *hci, void __iomem *base)
203 	hci->vendor_data = (__force void *)base;
204 	dev_info(&hci->master.dev, "Build Date Info = %#x\n", readl(base + 1*4));
214 	int (*parser)(struct i3c_hci *hci, void __iomem *base);
226 static int hci_extcap_vendor_specific(struct i3c_hci *hci, void __iomem *base,
234 		if (vendor_ext_caps[i].vendor == hci->vendor_mipi_id &&
242 		dev_notice(&hci->master.dev,
244 			   cap_id, hci->vendor_mipi_id);
248 		dev_err(&hci->master.dev,
253 	return vendor_cap_entry->parser(hci, base);
256 int i3c_hci_parse_ext_caps(struct i3c_hci *hci)
258 	void __iomem *curr_cap = hci->EXTCAPS_regs;
275 			dev_err(&hci->master.dev,
283 			err = hci_extcap_vendor_specific(hci, curr_cap,
296 			dev_notice(&hci->master.dev,
299 			dev_err(&hci->master.dev,
304 			err = cap_entry->parser(hci, curr_cap);