master/mipi-i3c-hci/dma.c

364 	u32 op1_val, op2_val;
371 	op1_val = rh_reg_read(RING_OPERATION1);
372 	enqueue_ptr = FIELD_GET(RING_OP1_CR_ENQ_PTR, op1_val);
436 	op1_val = rh_reg_read(RING_OPERATION1);
437 	op1_val &= ~RING_OP1_CR_ENQ_PTR;
438 	op1_val |= FIELD_PREP(RING_OP1_CR_ENQ_PTR, enqueue_ptr);
439 	rh_reg_write(RING_OPERATION1, op1_val);
502 	u32 op1_val, op2_val, resp, *ring_resp;
539 	op1_val = rh_reg_read(RING_OPERATION1);
540 	op1_val &= ~RING_OP1_CR_SW_DEQ_PTR;
541 	op1_val |= FIELD_PREP(RING_OP1_CR_SW_DEQ_PTR, done_ptr);
542 	rh_reg_write(RING_OPERATION1, op1_val);
593 	u32 op1_val, op2_val, ibi_status_error;
600 	op1_val = rh_reg_read(RING_OPERATION1);
601 	deq_ptr = FIELD_GET(RING_OP1_IBI_DEQ_PTR, op1_val);
722 	op1_val = rh_reg_read(RING_OPERATION1);
723 	op1_val &= ~RING_OP1_IBI_DEQ_PTR;
724 	op1_val |= FIELD_PREP(RING_OP1_IBI_DEQ_PTR, deq_ptr);
725 	rh_reg_write(RING_OPERATION1, op1_val);