Lines Matching refs:master
12 #include <linux/i3c/master.h>
422 to_cdns_i3c_master(struct i3c_master_controller *master)
424 return container_of(master, struct cdns_i3c_master, base);
427 static void cdns_i3c_master_wr_to_tx_fifo(struct cdns_i3c_master *master,
430 writesl(master->regs + TX_FIFO, bytes, nbytes / 4);
435 writesl(master->regs + TX_FIFO, &tmp, 1);
439 static void cdns_i3c_master_rd_from_rx_fifo(struct cdns_i3c_master *master,
442 readsl(master->regs + RX_FIFO, bytes, nbytes / 4);
446 readsl(master->regs + RX_FIFO, &tmp, 1);
492 static int cdns_i3c_master_disable(struct cdns_i3c_master *master)
496 writel(readl(master->regs + CTRL) & ~CTRL_DEV_EN, master->regs + CTRL);
498 return readl_poll_timeout(master->regs + MST_STATUS0, status,
502 static void cdns_i3c_master_enable(struct cdns_i3c_master *master)
504 writel(readl(master->regs + CTRL) | CTRL_DEV_EN, master->regs + CTRL);
508 cdns_i3c_master_alloc_xfer(struct cdns_i3c_master *master, unsigned int ncmds)
528 static void cdns_i3c_master_start_xfer_locked(struct cdns_i3c_master *master)
530 struct cdns_i3c_xfer *xfer = master->xferqueue.cur;
536 writel(MST_INT_CMDD_EMP, master->regs + MST_ICR);
540 cdns_i3c_master_wr_to_tx_fifo(master, cmd->tx_buf,
548 master->regs + CMD1_FIFO);
549 writel(cmd->cmd0, master->regs + CMD0_FIFO);
552 writel(readl(master->regs + CTRL) | CTRL_MCS,
553 master->regs + CTRL);
554 writel(MST_INT_CMDD_EMP, master->regs + MST_IER);
557 static void cdns_i3c_master_end_xfer_locked(struct cdns_i3c_master *master,
560 struct cdns_i3c_xfer *xfer = master->xferqueue.cur;
570 writel(MST_INT_CMDD_EMP, master->regs + MST_IDR);
572 for (status0 = readl(master->regs + MST_STATUS0);
574 status0 = readl(master->regs + MST_STATUS0)) {
578 cmdr = readl(master->regs + CMDR);
587 cdns_i3c_master_rd_from_rx_fifo(master, cmd->rx_buf, rx_len);
622 xfer = list_first_entry_or_null(&master->xferqueue.list,
627 master->xferqueue.cur = xfer;
628 cdns_i3c_master_start_xfer_locked(master);
631 static void cdns_i3c_master_queue_xfer(struct cdns_i3c_master *master,
637 spin_lock_irqsave(&master->xferqueue.lock, flags);
638 if (master->xferqueue.cur) {
639 list_add_tail(&xfer->node, &master->xferqueue.list);
641 master->xferqueue.cur = xfer;
642 cdns_i3c_master_start_xfer_locked(master);
644 spin_unlock_irqrestore(&master->xferqueue.lock, flags);
647 static void cdns_i3c_master_unqueue_xfer(struct cdns_i3c_master *master,
652 spin_lock_irqsave(&master->xferqueue.lock, flags);
653 if (master->xferqueue.cur == xfer) {
656 writel(readl(master->regs + CTRL) & ~CTRL_DEV_EN,
657 master->regs + CTRL);
658 readl_poll_timeout_atomic(master->regs + MST_STATUS0, status,
661 master->xferqueue.cur = NULL;
664 master->regs + FLUSH_CTRL);
665 writel(MST_INT_CMDD_EMP, master->regs + MST_IDR);
666 writel(readl(master->regs + CTRL) | CTRL_DEV_EN,
667 master->regs + CTRL);
671 spin_unlock_irqrestore(&master->xferqueue.lock, flags);
697 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
702 xfer = cdns_i3c_master_alloc_xfer(master, 1);
723 cdns_i3c_master_queue_xfer(master, xfer);
725 cdns_i3c_master_unqueue_xfer(master, xfer);
739 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
751 if (nxfers > master->caps.cmdfifodepth ||
752 nxfers > master->caps.cmdrfifodepth)
766 if (rxslots > master->caps.rxfifodepth ||
767 txslots > master->caps.txfifodepth)
770 cdns_xfer = cdns_i3c_master_alloc_xfer(master, nxfers);
800 cdns_i3c_master_queue_xfer(master, cdns_xfer);
803 cdns_i3c_master_unqueue_xfer(master, cdns_xfer);
819 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
824 if (nxfers > master->caps.cmdfifodepth)
837 if (ntxwords > master->caps.txfifodepth ||
838 nrxwords > master->caps.rxfifodepth)
841 xfer = cdns_i3c_master_alloc_xfer(master, nxfers);
865 cdns_i3c_master_queue_xfer(master, xfer);
867 cdns_i3c_master_unqueue_xfer(master, xfer);
901 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
908 writel(DEV_ID_RR0_IS_I3C | rr, master->regs + DEV_ID_RR0(data->id));
911 static int cdns_i3c_master_get_rr_slot(struct cdns_i3c_master *master,
919 if (!master->free_rr_slots)
922 return ffs(master->free_rr_slots) - 1;
925 activedevs = readl(master->regs + DEVS_CTRL) & DEVS_CTRL_DEVS_ACTIVE_MASK;
928 for_each_set_bit(i, &activedevs, master->maxdevs + 1) {
929 rr = readl(master->regs + DEV_ID_RR0(i));
951 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
959 slot = cdns_i3c_master_get_rr_slot(master, dev->info.dyn_addr);
968 master->free_rr_slots &= ~BIT(slot);
972 writel(readl(master->regs + DEVS_CTRL) |
974 master->regs + DEVS_CTRL);
983 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
986 writel(readl(master->regs + DEVS_CTRL) |
988 master->regs + DEVS_CTRL);
991 master->free_rr_slots |= BIT(data->id);
998 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
1002 slot = cdns_i3c_master_get_rr_slot(master, 0);
1011 master->free_rr_slots &= ~BIT(slot);
1015 master->regs + DEV_ID_RR0(data->id));
1016 writel(dev->lvr, master->regs + DEV_ID_RR2(data->id));
1017 writel(readl(master->regs + DEVS_CTRL) |
1019 master->regs + DEVS_CTRL);
1027 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
1030 writel(readl(master->regs + DEVS_CTRL) |
1032 master->regs + DEVS_CTRL);
1033 master->free_rr_slots |= BIT(data->id);
1041 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
1043 cdns_i3c_master_disable(master);
1046 static void cdns_i3c_master_dev_rr_to_info(struct cdns_i3c_master *master,
1053 rr = readl(master->regs + DEV_ID_RR0(slot));
1055 rr = readl(master->regs + DEV_ID_RR2(slot));
1059 info->pid |= (u64)readl(master->regs + DEV_ID_RR1(slot)) << 16;
1062 static void cdns_i3c_master_upd_i3c_scl_lim(struct cdns_i3c_master *master)
1064 struct i3c_master_controller *m = &master->base;
1101 if (new_i3c_scl_lim == master->i3c_scl_lim)
1103 master->i3c_scl_lim = new_i3c_scl_lim;
1109 prescl1 = readl(master->regs + PRESCL_CTRL1) &
1111 ctrl = readl(master->regs + CTRL);
1113 i3c_lim_period = DIV_ROUND_UP(1000000000, master->i3c_scl_lim);
1122 /* Disable I3C master before updating PRESCL_CTRL1. */
1124 cdns_i3c_master_disable(master);
1126 writel(prescl1, master->regs + PRESCL_CTRL1);
1129 cdns_i3c_master_enable(master);
1134 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
1140 olddevs = readl(master->regs + DEVS_CTRL) & DEVS_CTRL_DEVS_ACTIVE_MASK;
1144 for_each_clear_bit(slot, &olddevs, master->maxdevs + 1) {
1152 master->regs + DEV_ID_RR0(slot));
1153 writel(0, master->regs + DEV_ID_RR1(slot));
1154 writel(0, master->regs + DEV_ID_RR2(slot));
1157 ret = i3c_master_entdaa_locked(&master->base);
1161 newdevs = readl(master->regs + DEVS_CTRL) & DEVS_CTRL_DEVS_ACTIVE_MASK;
1168 for_each_set_bit(slot, &newdevs, master->maxdevs + 1)
1177 writel(readl(master->regs + DEVS_CTRL) |
1178 master->free_rr_slots << DEVS_CTRL_DEV_CLR_SHIFT,
1179 master->regs + DEVS_CTRL);
1181 i3c_master_defslvs_locked(&master->base);
1183 cdns_i3c_master_upd_i3c_scl_lim(master);
1192 static u8 cdns_i3c_master_calculate_thd_delay(struct cdns_i3c_master *master)
1194 unsigned long sysclk_rate = clk_get_rate(master->sysclk);
1195 u8 thd_delay = DIV_ROUND_UP(master->devdata->thd_delay_ns,
1208 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
1232 sysclk_rate = clk_get_rate(master->sysclk);
1256 writel(prescl0, master->regs + PRESCL_CTRL0);
1264 writel(prescl1, master->regs + PRESCL_CTRL1);
1266 /* Get an address for the master. */
1272 master->regs + DEV_ID_RR0(0));
1274 cdns_i3c_master_dev_rr_to_info(master, 0, &info);
1278 ret = i3c_master_set_info(&master->base, &info);
1294 * master output. This setting allows to meet this timing on master's
1297 ctrl |= CTRL_THD_DELAY(cdns_i3c_master_calculate_thd_delay(master));
1298 writel(ctrl, master->regs + CTRL);
1300 cdns_i3c_master_enable(master);
1305 static void cdns_i3c_master_handle_ibi(struct cdns_i3c_master *master,
1320 if (id >= master->ibi.num_slots || (ibir & IBIR_ERROR))
1323 dev = master->ibi.slots[id];
1324 spin_lock(&master->ibi.lock);
1334 readsl(master->regs + IBI_DATA_FIFO, buf, nbytes / 4);
1336 u32 tmp = __raw_readl(master->regs + IBI_DATA_FIFO);
1347 spin_unlock(&master->ibi.lock);
1355 readl(master->regs + IBI_DATA_FIFO);
1359 static void cnds_i3c_master_demux_ibis(struct cdns_i3c_master *master)
1363 writel(MST_INT_IBIR_THR, master->regs + MST_ICR);
1365 for (status0 = readl(master->regs + MST_STATUS0);
1367 status0 = readl(master->regs + MST_STATUS0)) {
1368 u32 ibir = readl(master->regs + IBIR);
1372 cdns_i3c_master_handle_ibi(master, ibir);
1377 queue_work(master->base.wq, &master->hj_work);
1392 struct cdns_i3c_master *master = data;
1395 status = readl(master->regs + MST_ISR);
1396 if (!(status & readl(master->regs + MST_IMR)))
1399 spin_lock(&master->xferqueue.lock);
1400 cdns_i3c_master_end_xfer_locked(master, status);
1401 spin_unlock(&master->xferqueue.lock);
1404 cnds_i3c_master_demux_ibis(master);
1412 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
1423 spin_lock_irqsave(&master->ibi.lock, flags);
1424 sirmap = readl(master->regs + SIR_MAP_DEV_REG(data->ibi));
1428 writel(sirmap, master->regs + SIR_MAP_DEV_REG(data->ibi));
1429 spin_unlock_irqrestore(&master->ibi.lock, flags);
1437 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
1443 spin_lock_irqsave(&master->ibi.lock, flags);
1444 sirmap = readl(master->regs + SIR_MAP_DEV_REG(data->ibi));
1455 writel(sirmap, master->regs + SIR_MAP_DEV_REG(data->ibi));
1456 spin_unlock_irqrestore(&master->ibi.lock, flags);
1461 spin_lock_irqsave(&master->ibi.lock, flags);
1462 sirmap = readl(master->regs + SIR_MAP_DEV_REG(data->ibi));
1466 writel(sirmap, master->regs + SIR_MAP_DEV_REG(data->ibi));
1467 spin_unlock_irqrestore(&master->ibi.lock, flags);
1477 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
1486 spin_lock_irqsave(&master->ibi.lock, flags);
1487 for (i = 0; i < master->ibi.num_slots; i++) {
1488 if (!master->ibi.slots[i]) {
1490 master->ibi.slots[i] = dev;
1494 spin_unlock_irqrestore(&master->ibi.lock, flags);
1496 if (i < master->ibi.num_slots)
1508 struct cdns_i3c_master *master = to_cdns_i3c_master(m);
1512 spin_lock_irqsave(&master->ibi.lock, flags);
1513 master->ibi.slots[data->ibi] = NULL;
1515 spin_unlock_irqrestore(&master->ibi.lock, flags);
1550 struct cdns_i3c_master *master = container_of(work,
1554 i3c_master_do_daa(&master->base);
1562 { .compatible = "cdns,i3c-master", .data = &cdns_i3c_devdata },
1568 struct cdns_i3c_master *master;
1572 master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL);
1573 if (!master)
1576 master->devdata = of_device_get_match_data(&pdev->dev);
1577 if (!master->devdata)
1580 master->regs = devm_platform_ioremap_resource(pdev, 0);
1581 if (IS_ERR(master->regs))
1582 return PTR_ERR(master->regs);
1584 master->pclk = devm_clk_get(&pdev->dev, "pclk");
1585 if (IS_ERR(master->pclk))
1586 return PTR_ERR(master->pclk);
1588 master->sysclk = devm_clk_get(&pdev->dev, "sysclk");
1589 if (IS_ERR(master->sysclk))
1590 return PTR_ERR(master->sysclk);
1596 ret = clk_prepare_enable(master->pclk);
1600 ret = clk_prepare_enable(master->sysclk);
1604 if (readl(master->regs + DEV_ID) != DEV_ID_I3C_MASTER) {
1609 spin_lock_init(&master->xferqueue.lock);
1610 INIT_LIST_HEAD(&master->xferqueue.list);
1612 INIT_WORK(&master->hj_work, cdns_i3c_master_hj);
1613 writel(0xffffffff, master->regs + MST_IDR);
1614 writel(0xffffffff, master->regs + SLV_IDR);
1616 dev_name(&pdev->dev), master);
1620 platform_set_drvdata(pdev, master);
1622 val = readl(master->regs + CONF_STATUS0);
1624 /* Device ID0 is reserved to describe this master. */
1625 master->maxdevs = CONF_STATUS0_DEVS_NUM(val);
1626 master->free_rr_slots = GENMASK(master->maxdevs, 1);
1627 master->caps.ibirfifodepth = CONF_STATUS0_IBIR_DEPTH(val);
1628 master->caps.cmdrfifodepth = CONF_STATUS0_CMDR_DEPTH(val);
1630 val = readl(master->regs + CONF_STATUS1);
1631 master->caps.cmdfifodepth = CONF_STATUS1_CMD_DEPTH(val);
1632 master->caps.rxfifodepth = CONF_STATUS1_RX_DEPTH(val);
1633 master->caps.txfifodepth = CONF_STATUS1_TX_DEPTH(val);
1635 spin_lock_init(&master->ibi.lock);
1636 master->ibi.num_slots = CONF_STATUS1_IBI_HW_RES(val);
1637 master->ibi.slots = devm_kcalloc(&pdev->dev, master->ibi.num_slots,
1638 sizeof(*master->ibi.slots),
1640 if (!master->ibi.slots) {
1645 writel(IBIR_THR(1), master->regs + CMD_IBI_THR_CTRL);
1646 writel(MST_INT_IBIR_THR, master->regs + MST_IER);
1647 writel(DEVS_CTRL_DEV_CLR_ALL, master->regs + DEVS_CTRL);
1649 ret = i3c_master_register(&master->base, &pdev->dev,
1657 clk_disable_unprepare(master->sysclk);
1660 clk_disable_unprepare(master->pclk);
1667 struct cdns_i3c_master *master = platform_get_drvdata(pdev);
1669 i3c_master_unregister(&master->base);
1671 clk_disable_unprepare(master->sysclk);
1672 clk_disable_unprepare(master->pclk);
1679 .name = "cdns-i3c-master",
1686 MODULE_DESCRIPTION("Cadence I3C master driver");
1688 MODULE_ALIAS("platform:cdns-i3c-master");