i3c/master/dw-i3c-master.c

366 	struct dw_i3c_xfer *xfer;
368 	xfer = kzalloc(struct_size(xfer, cmds, ncmds), GFP_KERNEL);
369 	if (!xfer)
372 	INIT_LIST_HEAD(&xfer->node);
373 	xfer->ncmds = ncmds;
374 	xfer->ret = -ETIMEDOUT;
376 	return xfer;
379 static void dw_i3c_master_free_xfer(struct dw_i3c_xfer *xfer)
381 	kfree(xfer);
386 	struct dw_i3c_xfer *xfer = master->xferqueue.cur;
390 	if (!xfer)
393 	for (i = 0; i < xfer->ncmds; i++) {
394 		struct dw_i3c_cmd *cmd = &xfer->cmds[i];
401 	thld_ctrl |= QUEUE_THLD_CTRL_RESP_BUF(xfer->ncmds);
404 	for (i = 0; i < xfer->ncmds; i++) {
405 		struct dw_i3c_cmd *cmd = &xfer->cmds[i];
413 				       struct dw_i3c_xfer *xfer)
417 	init_completion(&xfer->comp);
420 		list_add_tail(&xfer->node, &master->xferqueue.list);
422 		master->xferqueue.cur = xfer;
429 					      struct dw_i3c_xfer *xfer)
431 	if (master->xferqueue.cur == xfer) {
443 		list_del_init(&xfer->node);
448 				       struct dw_i3c_xfer *xfer)
453 	dw_i3c_master_dequeue_xfer_locked(master, xfer);
459 	struct dw_i3c_xfer *xfer = master->xferqueue.cur;
463 	if (!xfer)
475 		cmd = &xfer->cmds[RESPONSE_PORT_TID(resp)];
484 		switch (xfer->cmds[i].error) {
505 	xfer->ret = ret;
506 	complete(&xfer->comp);
509 		dw_i3c_master_dequeue_xfer_locked(master, xfer);
514 	xfer = list_first_entry_or_null(&master->xferqueue.list,
517 	if (xfer)
518 		list_del_init(&xfer->node);
520 	master->xferqueue.cur = xfer;
683 	struct dw_i3c_xfer *xfer;
693 	xfer = dw_i3c_master_alloc_xfer(master, 1);
694 	if (!xfer)
697 	cmd = xfer->cmds;
710 	dw_i3c_master_enqueue_xfer(master, xfer);
711 	if (!wait_for_completion_timeout(&xfer->comp, XFER_TIMEOUT))
712 		dw_i3c_master_dequeue_xfer(master, xfer);
714 	ret = xfer->ret;
715 	if (xfer->cmds[0].error == RESPONSE_ERROR_IBA_NACK)
718 	dw_i3c_master_free_xfer(xfer);
725 	struct dw_i3c_xfer *xfer;
733 	xfer = dw_i3c_master_alloc_xfer(master, 1);
734 	if (!xfer)
737 	cmd = xfer->cmds;
751 	dw_i3c_master_enqueue_xfer(master, xfer);
752 	if (!wait_for_completion_timeout(&xfer->comp, XFER_TIMEOUT))
753 		dw_i3c_master_dequeue_xfer(master, xfer);
755 	ret = xfer->ret;
756 	if (xfer->cmds[0].error == RESPONSE_ERROR_IBA_NACK)
758 	dw_i3c_master_free_xfer(xfer);
783 	struct dw_i3c_xfer *xfer;
810 	xfer = dw_i3c_master_alloc_xfer(master, 1);
811 	if (!xfer)
816 		dw_i3c_master_free_xfer(xfer);
819 	cmd = &xfer->cmds[0];
828 	dw_i3c_master_enqueue_xfer(master, xfer);
829 	if (!wait_for_completion_timeout(&xfer->comp, XFER_TIMEOUT))
830 		dw_i3c_master_dequeue_xfer(master, xfer);
840 	dw_i3c_master_free_xfer(xfer);
853 	struct dw_i3c_xfer *xfer;
873 	xfer = dw_i3c_master_alloc_xfer(master, i3c_nxfers);
874 	if (!xfer)
878 		struct dw_i3c_cmd *cmd = &xfer->cmds[i];
904 	dw_i3c_master_enqueue_xfer(master, xfer);
905 	if (!wait_for_completion_timeout(&xfer->comp, XFER_TIMEOUT))
906 		dw_i3c_master_dequeue_xfer(master, xfer);
909 		struct dw_i3c_cmd *cmd = &xfer->cmds[i];
915 	ret = xfer->ret;
916 	dw_i3c_master_free_xfer(xfer);
1004 	struct dw_i3c_xfer *xfer;
1024 	xfer = dw_i3c_master_alloc_xfer(master, i2c_nxfers);
1025 	if (!xfer)
1029 		struct dw_i3c_cmd *cmd = &xfer->cmds[i];
1051 	dw_i3c_master_enqueue_xfer(master, xfer);
1052 	if (!wait_for_completion_timeout(&xfer->comp, XFER_TIMEOUT))
1053 		dw_i3c_master_dequeue_xfer(master, xfer);
1055 	ret = xfer->ret;
1056 	dw_i3c_master_free_xfer(xfer);