Lines Matching refs:i2c
2 /* linux/drivers/i2c/busses/i2c-s3c2410.c
13 #include <linux/i2c.h>
34 #include <linux/platform_data/i2c-s3c2410.h>
87 /* i2c controller state */
125 .name = "s3c2410-i2c",
128 .name = "s3c2440-i2c",
131 .name = "s3c2440-hdmiphy-i2c",
137 static void i2c_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat);
141 { .compatible = "samsung,s3c2410-i2c", .data = (void *)0 },
142 { .compatible = "samsung,s3c2440-i2c", .data = (void *)QUIRK_S3C2440 },
143 { .compatible = "samsung,s3c2440-hdmiphy-i2c",
145 { .compatible = "samsung,exynos5-sata-phy-i2c",
167 static inline void s3c24xx_i2c_master_complete(struct s3c24xx_i2c *i2c, int ret)
169 dev_dbg(i2c->dev, "master_complete %d\n", ret);
171 i2c->msg_ptr = 0;
172 i2c->msg = NULL;
173 i2c->msg_idx++;
174 i2c->msg_num = 0;
176 i2c->msg_idx = ret;
178 if (!(i2c->quirks & (QUIRK_POLL | QUIRK_ATOMIC)))
179 wake_up(&i2c->wait);
182 static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c)
186 tmp = readl(i2c->regs + S3C2410_IICCON);
187 writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
190 static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c)
194 tmp = readl(i2c->regs + S3C2410_IICCON);
195 writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
199 static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c)
203 tmp = readl(i2c->regs + S3C2410_IICCON);
204 writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
207 static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c)
211 tmp = readl(i2c->regs + S3C2410_IICCON);
212 writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
215 static bool is_ack(struct s3c24xx_i2c *i2c)
220 unsigned long tmp = readl(i2c->regs + S3C2410_IICCON);
231 if (!(readl(i2c->regs + S3C2410_IICSTAT)
237 dev_err(i2c->dev, "ack was not received\n");
244 static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c,
264 s3c24xx_i2c_enable_ack(i2c);
266 iiccon = readl(i2c->regs + S3C2410_IICCON);
267 writel(stat, i2c->regs + S3C2410_IICSTAT);
269 dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr);
270 writeb(addr, i2c->regs + S3C2410_IICDS);
276 ndelay(i2c->tx_setup);
278 dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon);
279 writel(iiccon, i2c->regs + S3C2410_IICCON);
282 writel(stat, i2c->regs + S3C2410_IICSTAT);
285 static inline void s3c24xx_i2c_stop(struct s3c24xx_i2c *i2c, int ret)
287 unsigned long iicstat = readl(i2c->regs + S3C2410_IICSTAT);
289 dev_dbg(i2c->dev, "STOP\n");
325 if (i2c->quirks & QUIRK_HDMIPHY) {
332 writel(iicstat, i2c->regs + S3C2410_IICSTAT);
334 i2c->state = STATE_STOP;
336 s3c24xx_i2c_master_complete(i2c, ret);
337 s3c24xx_i2c_disable_irq(i2c);
348 static inline int is_lastmsg(struct s3c24xx_i2c *i2c)
350 return i2c->msg_idx >= (i2c->msg_num - 1);
356 static inline int is_msglast(struct s3c24xx_i2c *i2c)
363 if (i2c->msg->flags & I2C_M_RECV_LEN && i2c->msg->len == 1)
366 return i2c->msg_ptr == i2c->msg->len-1;
372 static inline int is_msgend(struct s3c24xx_i2c *i2c)
374 return i2c->msg_ptr >= i2c->msg->len;
380 static void i2c_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat)
385 switch (i2c->state) {
388 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__);
392 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__);
393 s3c24xx_i2c_disable_irq(i2c);
399 * bus, or started a new i2c message
402 !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
404 dev_dbg(i2c->dev, "ack was not received\n");
405 s3c24xx_i2c_stop(i2c, -ENXIO);
409 if (i2c->msg->flags & I2C_M_RD)
410 i2c->state = STATE_READ;
412 i2c->state = STATE_WRITE;
416 * as this is used by the i2c probe to find devices.
418 if (is_lastmsg(i2c) && i2c->msg->len == 0) {
419 s3c24xx_i2c_stop(i2c, 0);
423 if (i2c->state == STATE_READ)
436 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
438 dev_dbg(i2c->dev, "WRITE: No Ack\n");
440 s3c24xx_i2c_stop(i2c, -ECONNREFUSED);
447 if (!is_msgend(i2c)) {
448 byte = i2c->msg->buf[i2c->msg_ptr++];
449 writeb(byte, i2c->regs + S3C2410_IICDS);
458 ndelay(i2c->tx_setup);
460 } else if (!is_lastmsg(i2c)) {
461 /* we need to go to the next i2c message */
463 dev_dbg(i2c->dev, "WRITE: Next Message\n");
465 i2c->msg_ptr = 0;
466 i2c->msg_idx++;
467 i2c->msg++;
470 if (i2c->msg->flags & I2C_M_NOSTART) {
472 if (i2c->msg->flags & I2C_M_RD) {
478 dev_dbg(i2c->dev,
480 s3c24xx_i2c_stop(i2c, -EINVAL);
487 s3c24xx_i2c_message_start(i2c, i2c->msg);
488 i2c->state = STATE_START;
493 s3c24xx_i2c_stop(i2c, 0);
503 byte = readb(i2c->regs + S3C2410_IICDS);
504 i2c->msg->buf[i2c->msg_ptr++] = byte;
507 if (i2c->msg->flags & I2C_M_RECV_LEN && i2c->msg->len == 1)
508 i2c->msg->len += byte;
510 if (is_msglast(i2c)) {
513 if (is_lastmsg(i2c))
514 s3c24xx_i2c_disable_ack(i2c);
516 } else if (is_msgend(i2c)) {
521 if (is_lastmsg(i2c)) {
523 dev_dbg(i2c->dev, "READ: Send Stop\n");
525 s3c24xx_i2c_stop(i2c, 0);
528 dev_dbg(i2c->dev, "READ: Next Transfer\n");
530 i2c->msg_ptr = 0;
531 i2c->msg_idx++;
532 i2c->msg++;
542 tmp = readl(i2c->regs + S3C2410_IICCON);
544 writel(tmp, i2c->regs + S3C2410_IICCON);
554 struct s3c24xx_i2c *i2c = dev_id;
558 status = readl(i2c->regs + S3C2410_IICSTAT);
562 dev_err(i2c->dev, "deal with arbitration loss\n");
565 if (i2c->state == STATE_IDLE) {
566 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");
568 tmp = readl(i2c->regs + S3C2410_IICCON);
570 writel(tmp, i2c->regs + S3C2410_IICCON);
578 i2c_s3c_irq_nextbyte(i2c, status);
593 static inline void s3c24xx_i2c_disable_bus(struct s3c24xx_i2c *i2c)
598 tmp = readl(i2c->regs + S3C2410_IICSTAT);
600 writel(tmp, i2c->regs + S3C2410_IICSTAT);
603 tmp = readl(i2c->regs + S3C2410_IICCON);
606 writel(tmp, i2c->regs + S3C2410_IICCON);
611 * get the i2c bus for a master transaction
613 static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
619 iicstat = readl(i2c->regs + S3C2410_IICSTAT);
631 * wait for the i2c bus to become idle.
633 static void s3c24xx_i2c_wait_idle(struct s3c24xx_i2c *i2c)
642 dev_dbg(i2c->dev, "waiting for bus idle\n");
648 * end of a transaction. However, really slow i2c devices can stretch
655 iicstat = readl(i2c->regs + S3C2410_IICSTAT);
658 iicstat = readl(i2c->regs + S3C2410_IICSTAT);
675 iicstat = readl(i2c->regs + S3C2410_IICSTAT);
679 dev_warn(i2c->dev, "timeout waiting for bus idle\n");
683 * this starts an i2c transfer
685 static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c,
691 ret = s3c24xx_i2c_set_master(i2c);
693 dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
698 i2c->msg = msgs;
699 i2c->msg_num = num;
700 i2c->msg_ptr = 0;
701 i2c->msg_idx = 0;
702 i2c->state = STATE_START;
704 s3c24xx_i2c_enable_irq(i2c);
705 s3c24xx_i2c_message_start(i2c, msgs);
707 if (i2c->quirks & (QUIRK_POLL | QUIRK_ATOMIC)) {
708 while ((i2c->msg_num != 0) && is_ack(i2c)) {
709 unsigned long stat = readl(i2c->regs + S3C2410_IICSTAT);
711 i2c_s3c_irq_nextbyte(i2c, stat);
713 stat = readl(i2c->regs + S3C2410_IICSTAT);
715 dev_err(i2c->dev, "deal with arbitration loss\n");
718 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
721 ret = i2c->msg_idx;
728 dev_dbg(i2c->dev, "timeout\n");
730 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret);
733 if (i2c->quirks & QUIRK_HDMIPHY)
736 s3c24xx_i2c_wait_idle(i2c);
738 s3c24xx_i2c_disable_bus(i2c);
741 i2c->state = STATE_IDLE;
747 * first port of call from the i2c bus code when an message needs
748 * transferring across the i2c bus.
753 struct s3c24xx_i2c *i2c = (struct s3c24xx_i2c *)adap->algo_data;
757 ret = clk_enable(i2c->clk);
763 ret = s3c24xx_i2c_doxfer(i2c, msgs, num);
766 clk_disable(i2c->clk);
770 dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
775 clk_disable(i2c->clk);
782 struct s3c24xx_i2c *i2c = (struct s3c24xx_i2c *)adap->algo_data;
785 disable_irq(i2c->irq);
786 i2c->quirks |= QUIRK_ATOMIC;
788 i2c->quirks &= ~QUIRK_ATOMIC;
789 enable_irq(i2c->irq);
794 /* declare our i2c functionality */
801 /* i2c bus registration info */
841 static int s3c24xx_i2c_clockrate(struct s3c24xx_i2c *i2c, unsigned int *got)
843 struct s3c2410_platform_i2c *pdata = i2c->pdata;
844 unsigned long clkin = clk_get_rate(i2c->clk);
850 i2c->clkrate = clkin;
853 dev_dbg(i2c->dev, "pdata desired frequency %lu\n", pdata->frequency);
862 dev_err(i2c->dev,
870 iiccon = readl(i2c->regs + S3C2410_IICCON);
877 if (i2c->quirks & QUIRK_POLL)
880 writel(iiccon, i2c->regs + S3C2410_IICCON);
882 if (i2c->quirks & QUIRK_S3C2440) {
895 dev_dbg(i2c->dev, "IICLC=%08lx\n", sda_delay);
896 writel(sda_delay, i2c->regs + S3C2440_IICLC);
903 static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c)
907 if (i2c->quirks & QUIRK_NO_GPIO)
911 i2c->gpios[i] = devm_gpiod_get_index(i2c->dev, NULL,
913 if (IS_ERR(i2c->gpios[i])) {
914 dev_err(i2c->dev, "i2c gpio invalid at index %d\n", i);
922 static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c)
931 static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)
938 pdata = i2c->pdata;
942 writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD);
944 dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr);
946 writel(0, i2c->regs + S3C2410_IICCON);
947 writel(0, i2c->regs + S3C2410_IICSTAT);
951 if (s3c24xx_i2c_clockrate(i2c, &freq) != 0) {
952 dev_err(i2c->dev, "cannot meet bus frequency required\n");
956 /* todo - check that the i2c lines aren't being dragged anywhere */
958 dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq);
959 dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02x\n",
960 readl(i2c->regs + S3C2410_IICCON));
970 s3c24xx_i2c_parse_dt(struct device_node *np, struct s3c24xx_i2c *i2c)
972 struct s3c2410_platform_i2c *pdata = i2c->pdata;
978 pdata->bus_num = -1; /* i2c bus number is dynamically assigned */
979 of_property_read_u32(np, "samsung,i2c-sda-delay", &pdata->sda_delay);
980 of_property_read_u32(np, "samsung,i2c-slave-addr", &pdata->slave_addr);
981 of_property_read_u32(np, "samsung,i2c-max-bus-freq",
984 * Exynos5's legacy i2c controller and new high speed i2c
987 * If nodes for first four channels of legacy i2c controller
991 id = of_alias_get_id(np, "i2c");
992 i2c->sysreg = syscon_regmap_lookup_by_phandle(np,
994 if (IS_ERR(i2c->sysreg))
997 regmap_update_bits(i2c->sysreg, EXYNOS5_SYS_I2C_CFG, BIT(id), 0);
1001 s3c24xx_i2c_parse_dt(struct device_node *np, struct s3c24xx_i2c *i2c) { }
1006 struct s3c24xx_i2c *i2c;
1019 i2c = devm_kzalloc(&pdev->dev, sizeof(struct s3c24xx_i2c), GFP_KERNEL);
1020 if (!i2c)
1023 i2c->pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
1024 if (!i2c->pdata)
1027 i2c->quirks = s3c24xx_get_device_quirks(pdev);
1028 i2c->sysreg = ERR_PTR(-ENOENT);
1030 memcpy(i2c->pdata, pdata, sizeof(*pdata));
1032 s3c24xx_i2c_parse_dt(pdev->dev.of_node, i2c);
1034 strscpy(i2c->adap.name, "s3c2410-i2c", sizeof(i2c->adap.name));
1035 i2c->adap.owner = THIS_MODULE;
1036 i2c->adap.algo = &s3c24xx_i2c_algorithm;
1037 i2c->adap.retries = 2;
1038 i2c->adap.class = I2C_CLASS_DEPRECATED;
1039 i2c->tx_setup = 50;
1041 init_waitqueue_head(&i2c->wait);
1044 i2c->dev = &pdev->dev;
1045 i2c->clk = devm_clk_get(&pdev->dev, "i2c");
1046 if (IS_ERR(i2c->clk)) {
1051 dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk);
1054 i2c->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
1055 if (IS_ERR(i2c->regs))
1056 return PTR_ERR(i2c->regs);
1059 i2c->regs, res);
1061 /* setup info block for the i2c core */
1062 i2c->adap.algo_data = i2c;
1063 i2c->adap.dev.parent = &pdev->dev;
1064 i2c->pctrl = devm_pinctrl_get_select_default(i2c->dev);
1066 /* inititalise the i2c gpio lines */
1067 if (i2c->pdata->cfg_gpio)
1068 i2c->pdata->cfg_gpio(to_platform_device(i2c->dev));
1069 else if (IS_ERR(i2c->pctrl) && s3c24xx_i2c_parse_dt_gpio(i2c))
1072 /* initialise the i2c controller */
1073 ret = clk_prepare_enable(i2c->clk);
1079 ret = s3c24xx_i2c_init(i2c);
1080 clk_disable(i2c->clk);
1083 clk_unprepare(i2c->clk);
1091 if (!(i2c->quirks & QUIRK_POLL)) {
1092 i2c->irq = ret = platform_get_irq(pdev, 0);
1094 clk_unprepare(i2c->clk);
1098 ret = devm_request_irq(&pdev->dev, i2c->irq, s3c24xx_i2c_irq,
1099 0, dev_name(&pdev->dev), i2c);
1101 dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq);
1102 clk_unprepare(i2c->clk);
1113 i2c->adap.nr = i2c->pdata->bus_num;
1114 i2c->adap.dev.of_node = pdev->dev.of_node;
1116 platform_set_drvdata(pdev, i2c);
1120 ret = i2c_add_numbered_adapter(&i2c->adap);
1123 clk_unprepare(i2c->clk);
1127 dev_info(&pdev->dev, "%s: S3C I2C adapter\n", dev_name(&i2c->adap.dev));
1133 struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
1135 clk_unprepare(i2c->clk);
1139 i2c_del_adapter(&i2c->adap);
1144 struct s3c24xx_i2c *i2c = dev_get_drvdata(dev);
1146 i2c_mark_adapter_suspended(&i2c->adap);
1148 if (!IS_ERR(i2c->sysreg))
1149 regmap_read(i2c->sysreg, EXYNOS5_SYS_I2C_CFG, &i2c->sys_i2c_cfg);
1156 struct s3c24xx_i2c *i2c = dev_get_drvdata(dev);
1159 if (!IS_ERR(i2c->sysreg))
1160 regmap_write(i2c->sysreg, EXYNOS5_SYS_I2C_CFG, i2c->sys_i2c_cfg);
1162 ret = clk_enable(i2c->clk);
1165 s3c24xx_i2c_init(i2c);
1166 clk_disable(i2c->clk);
1167 i2c_mark_adapter_resumed(&i2c->adap);
1182 .name = "s3c-i2c",