7  * This file contains the shared part of the driver for the i2c adapter in
16 #include <linux/i2c.h>
21 #include "i2c-octeon-core.h"
26 	struct octeon_i2c *i2c = dev_id;
28 	i2c->int_disable(i2c);
29 	wake_up(&i2c->queue);
34 static bool octeon_i2c_test_iflg(struct octeon_i2c *i2c)
36 	return (octeon_i2c_ctl_read(i2c) & TWSI_CTL_IFLG);
41  * @i2c: The struct octeon_i2c
45 static int octeon_i2c_wait(struct octeon_i2c *i2c)
53 	if (i2c->broken_irq_mode) {
54 		u64 end = get_jiffies_64() + i2c->adap.timeout;
56 		while (!octeon_i2c_test_iflg(i2c) &&
60 		return octeon_i2c_test_iflg(i2c) ? 0 : -ETIMEDOUT;
63 	i2c->int_enable(i2c);
64 	time_left = wait_event_timeout(i2c->queue, octeon_i2c_test_iflg(i2c),
65 				       i2c->adap.timeout);
66 	i2c->int_disable(i2c);
68 	if (i2c->broken_irq_check && !time_left &&
69 	    octeon_i2c_test_iflg(i2c)) {
70 		dev_err(i2c->dev, "broken irq connection detected, switching to polling mode.\n");
71 		i2c->broken_irq_mode = true;
81 static bool octeon_i2c_hlc_test_valid(struct octeon_i2c *i2c)
83 	return (__raw_readq(i2c->twsi_base + SW_TWSI(i2c)) & SW_TWSI_V) == 0;
86 static void octeon_i2c_hlc_int_clear(struct octeon_i2c *i2c)
89 	octeon_i2c_write_int(i2c, TWSI_INT_ST_INT | TWSI_INT_TS_INT);
95 static void octeon_i2c_hlc_enable(struct octeon_i2c *i2c)
100 	if (i2c->hlc_enabled)
102 	i2c->hlc_enabled = true;
105 		val = octeon_i2c_ctl_read(i2c);
111 			octeon_i2c_ctl_write(i2c, TWSI_CTL_ENAB);
121 	octeon_i2c_ctl_write(i2c, TWSI_CTL_CE | TWSI_CTL_AAK | TWSI_CTL_ENAB);
124 static void octeon_i2c_hlc_disable(struct octeon_i2c *i2c)
126 	if (!i2c->hlc_enabled)
129 	i2c->hlc_enabled = false;
130 	octeon_i2c_ctl_write(i2c, TWSI_CTL_ENAB);
135  * @i2c: The struct octeon_i2c
139 static int octeon_i2c_hlc_wait(struct octeon_i2c *i2c)
147 	if (i2c->broken_irq_mode) {
148 		u64 end = get_jiffies_64() + i2c->adap.timeout;
150 		while (!octeon_i2c_hlc_test_valid(i2c) &&
154 		return octeon_i2c_hlc_test_valid(i2c) ? 0 : -ETIMEDOUT;
157 	i2c->hlc_int_enable(i2c);
158 	time_left = wait_event_timeout(i2c->queue,
159 				       octeon_i2c_hlc_test_valid(i2c),
160 				       i2c->adap.timeout);
161 	i2c->hlc_int_disable(i2c);
163 		octeon_i2c_hlc_int_clear(i2c);
165 	if (i2c->broken_irq_check && !time_left &&
166 	    octeon_i2c_hlc_test_valid(i2c)) {
167 		dev_err(i2c->dev, "broken irq connection detected, switching to polling mode.\n");
168 		i2c->broken_irq_mode = true;
177 static int octeon_i2c_check_status(struct octeon_i2c *i2c, int final_read)
185 	if (i2c->hlc_enabled)
186 		stat = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
188 		stat = octeon_i2c_stat_read(i2c);
243 		dev_err(i2c->dev, "unhandled state: %d\n", stat);
248 static int octeon_i2c_recovery(struct octeon_i2c *i2c)
252 	ret = i2c_recover_bus(&i2c->adap);
255 		ret = octeon_i2c_init_lowlevel(i2c);
261  * @i2c: The struct octeon_i2c
265 static int octeon_i2c_start(struct octeon_i2c *i2c)
270 	octeon_i2c_hlc_disable(i2c);
272 	octeon_i2c_ctl_write(i2c, TWSI_CTL_ENAB | TWSI_CTL_STA);
273 	ret = octeon_i2c_wait(i2c);
277 	stat = octeon_i2c_stat_read(i2c);
284 	ret = octeon_i2c_recovery(i2c);
289 static void octeon_i2c_stop(struct octeon_i2c *i2c)
291 	octeon_i2c_ctl_write(i2c, TWSI_CTL_ENAB | TWSI_CTL_STP);
296  * @i2c: The struct octeon_i2c
306 static int octeon_i2c_read(struct octeon_i2c *i2c, int target,
312 	octeon_i2c_data_write(i2c, (target << 1) | 1);
313 	octeon_i2c_ctl_write(i2c, TWSI_CTL_ENAB);
315 	result = octeon_i2c_wait(i2c);
320 	result = octeon_i2c_check_status(i2c, false);
338 			octeon_i2c_ctl_write(i2c, TWSI_CTL_ENAB);
340 			octeon_i2c_ctl_write(i2c, TWSI_CTL_ENAB | TWSI_CTL_AAK);
342 		result = octeon_i2c_wait(i2c);
346 		data[i] = octeon_i2c_data_read(i2c, &result);
355 		result = octeon_i2c_check_status(i2c, final_read);
365  * @i2c: The struct octeon_i2c
374 static int octeon_i2c_write(struct octeon_i2c *i2c, int target,
379 	octeon_i2c_data_write(i2c, target << 1);
380 	octeon_i2c_ctl_write(i2c, TWSI_CTL_ENAB);
382 	result = octeon_i2c_wait(i2c);
387 		result = octeon_i2c_check_status(i2c, false);
391 		octeon_i2c_data_write(i2c, data[i]);
392 		octeon_i2c_ctl_write(i2c, TWSI_CTL_ENAB);
394 		result = octeon_i2c_wait(i2c);
403 static int octeon_i2c_hlc_read(struct octeon_i2c *i2c, struct i2c_msg *msgs)
408 	octeon_i2c_hlc_enable(i2c);
409 	octeon_i2c_hlc_int_clear(i2c);
422 	octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI(i2c));
423 	ret = octeon_i2c_hlc_wait(i2c);
427 	cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
429 		return octeon_i2c_check_status(i2c, false);
435 		cmd = __raw_readq(i2c->twsi_base + SW_TWSI_EXT(i2c));
445 static int octeon_i2c_hlc_write(struct octeon_i2c *i2c, struct i2c_msg *msgs)
450 	octeon_i2c_hlc_enable(i2c);
451 	octeon_i2c_hlc_int_clear(i2c);
472 		octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT(i2c));
475 	octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI(i2c));
476 	ret = octeon_i2c_hlc_wait(i2c);
480 	cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
482 		return octeon_i2c_check_status(i2c, false);
489 static int octeon_i2c_hlc_comp_read(struct octeon_i2c *i2c, struct i2c_msg *msgs)
494 	octeon_i2c_hlc_enable(i2c);
513 		octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT(i2c));
518 	octeon_i2c_hlc_int_clear(i2c);
519 	octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI(i2c));
521 	ret = octeon_i2c_hlc_wait(i2c);
525 	cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
527 		return octeon_i2c_check_status(i2c, false);
533 		cmd = __raw_readq(i2c->twsi_base + SW_TWSI_EXT(i2c));
543 static int octeon_i2c_hlc_comp_write(struct octeon_i2c *i2c, struct i2c_msg *msgs)
549 	octeon_i2c_hlc_enable(i2c);
580 		octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT(i2c));
582 	octeon_i2c_hlc_int_clear(i2c);
583 	octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI(i2c));
585 	ret = octeon_i2c_hlc_wait(i2c);
589 	cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
591 		return octeon_i2c_check_status(i2c, false);
607 	struct octeon_i2c *i2c = i2c_get_adapdata(adap);
613 				ret = octeon_i2c_hlc_read(i2c, msgs);
615 				ret = octeon_i2c_hlc_write(i2c, msgs);
625 				ret = octeon_i2c_hlc_comp_read(i2c, msgs);
627 				ret = octeon_i2c_hlc_comp_write(i2c, msgs);
641 		ret = octeon_i2c_start(i2c);
646 			ret = octeon_i2c_read(i2c, pmsg->addr, pmsg->buf,
649 			ret = octeon_i2c_write(i2c, pmsg->addr, pmsg->buf,
652 	octeon_i2c_stop(i2c);
658 void octeon_i2c_set_clock(struct octeon_i2c *i2c)
673 			tclk = i2c->twsi_freq * (mdiv_idx + 1) * 10;
675 			thp_base = (i2c->sys_freq / (tclk * 2)) - 1;
682 				foscl = i2c->sys_freq / (2 * (thp_idx + 1));
685 				diff = abs(foscl - i2c->twsi_freq);
695 	octeon_i2c_reg_write(i2c, SW_TWSI_OP_TWSI_CLK, thp);
696 	octeon_i2c_reg_write(i2c, SW_TWSI_EOP_TWSI_CLKCTL, (mdiv << 3) | ndiv);
699 int octeon_i2c_init_lowlevel(struct octeon_i2c *i2c)
705 	octeon_i2c_reg_write(i2c, SW_TWSI_EOP_TWSI_RST, 0);
709 		status = octeon_i2c_stat_read(i2c);
715 		dev_err(i2c->dev, "%s: TWSI_RST failed! (0x%x)\n",
721 	octeon_i2c_hlc_enable(i2c);
722 	octeon_i2c_hlc_disable(i2c);
728 	struct octeon_i2c *i2c = i2c_get_adapdata(adap);
731 	state = octeon_i2c_read_int(i2c);
737 	struct octeon_i2c *i2c = i2c_get_adapdata(adap);
739 	octeon_i2c_write_int(i2c, val ? 0 : TWSI_INT_SCL_OVR);
744 	struct octeon_i2c *i2c = i2c_get_adapdata(adap);
747 	state = octeon_i2c_read_int(i2c);
753 	struct octeon_i2c *i2c = i2c_get_adapdata(adap);
755 	octeon_i2c_hlc_disable(i2c);
756 	octeon_i2c_reg_write(i2c, SW_TWSI_EOP_TWSI_RST, 0);
764 	octeon_i2c_ctl_write(i2c, TWSI_CTL_ENAB);
766 	octeon_i2c_write_int(i2c, 0);
771 	struct octeon_i2c *i2c = i2c_get_adapdata(adap);
778 	octeon_i2c_write_int(i2c, TWSI_INT_SDA_OVR | TWSI_INT_SCL_OVR);
780 	octeon_i2c_write_int(i2c, TWSI_INT_SDA_OVR);
782 	octeon_i2c_write_int(i2c, 0);

Indexes created Sat May 04 09:44:38 MDT 2024