i2c/busses/i2c-mv64xxx.c

127 	void __iomem		*reg_base;
212 		writel(0, drv_data->reg_base + MV64XXX_I2C_REG_BRIDGE_CONTROL);
213 		writel(0, drv_data->reg_base + MV64XXX_I2C_REG_BRIDGE_TIMING);
214 		writel(0, drv_data->reg_base +
216 		writel(0, drv_data->reg_base +
220 	writel(0, drv_data->reg_base + drv_data->reg_offsets.soft_reset);
222 		drv_data->reg_base + drv_data->reg_offsets.clock);
223 	writel(0, drv_data->reg_base + drv_data->reg_offsets.addr);
224 	writel(0, drv_data->reg_base + drv_data->reg_offsets.ext_addr);
226 		drv_data->reg_base + drv_data->reg_offsets.control);
353 	       drv_data->reg_base + drv_data->reg_offsets.control);
381 			drv_data->reg_base + drv_data->reg_offsets.control);
386 			drv_data->reg_base + drv_data->reg_offsets.data);
388 			drv_data->reg_base + drv_data->reg_offsets.control);
393 			drv_data->reg_base + drv_data->reg_offsets.data);
395 			drv_data->reg_base + drv_data->reg_offsets.control);
400 			drv_data->reg_base + drv_data->reg_offsets.data);
402 			drv_data->reg_base + drv_data->reg_offsets.control);
407 			readl(drv_data->reg_base + drv_data->reg_offsets.data);
409 			drv_data->reg_base + drv_data->reg_offsets.control);
414 			readl(drv_data->reg_base + drv_data->reg_offsets.data);
418 			drv_data->reg_base + drv_data->reg_offsets.control);
437 			drv_data->reg_base + drv_data->reg_offsets.control);
450 	buf[0] = readl(drv_data->reg_base + MV64XXX_I2C_REG_RX_DATA_LO);
451 	buf[1] = readl(drv_data->reg_base + MV64XXX_I2C_REG_RX_DATA_HI);
461 	cause = readl(drv_data->reg_base +
466 	status = readl(drv_data->reg_base +
498 	writel(0, drv_data->reg_base +	MV64XXX_I2C_REG_BRIDGE_CONTROL);
499 	writel(0, drv_data->reg_base +
520 	while (readl(drv_data->reg_base + drv_data->reg_offsets.control) &
533 		status = readl(drv_data->reg_base + drv_data->reg_offsets.status);
539 			       drv_data->reg_base + drv_data->reg_offsets.control);
636 	writel(buf[0], drv_data->reg_base + MV64XXX_I2C_REG_TX_DATA_LO);
637 	writel(buf[1], drv_data->reg_base + MV64XXX_I2C_REG_TX_DATA_HI);
691 	writel(ctrl_reg, drv_data->reg_base + MV64XXX_I2C_REG_BRIDGE_CONTROL);
998 	drv_data->reg_base = devm_platform_ioremap_resource(pd, 0);
999 	if (IS_ERR(drv_data->reg_base))
1000 		return PTR_ERR(drv_data->reg_base);