i2c/busses/i2c-eg20t.c

111 #define pch_dbg(adap, fmt, arg...)  \
112 	dev_dbg(adap->pch_adapter.dev.parent, "%s :" fmt, __func__, ##arg)
114 #define pch_err(adap, fmt, arg...)  \
115 	dev_err(adap->pch_adapter.dev.parent, "%s :" fmt, __func__, ##arg)
205  * @adap:	Pointer to struct i2c_algo_pch_data.
207 static void pch_i2c_init(struct i2c_algo_pch_data *adap)
209 	void __iomem *p = adap->pch_base_address;
222 	pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_I2CCTL_I2CMEN);
230 		pch_dbg(adap, "Fast mode enabled\n");
246 	pch_dbg(adap,
255  * @adap:	Pointer to struct i2c_algo_pch_data.
258 static s32 pch_i2c_wait_for_bus_idle(struct i2c_algo_pch_data *adap,
261 	void __iomem *p = adap->pch_base_address;
267 			pch_dbg(adap, "I2CSR = %x\n", ioread32(p + PCH_I2CSR));
268 			pch_err(adap, "%s: Timeout Error.return%d\n",
270 			pch_i2c_init(adap);
290  * @adap:	Pointer to struct i2c_algo_pch_data.
294 static void pch_i2c_start(struct i2c_algo_pch_data *adap)
296 	void __iomem *p = adap->pch_base_address;
297 	pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
298 	pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_START);
303  * @adap:	Pointer to struct i2c_algo_pch_data.
305 static void pch_i2c_stop(struct i2c_algo_pch_data *adap)
307 	void __iomem *p = adap->pch_base_address;
308 	pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
310 	pch_clrbit(adap->pch_base_address, PCH_I2CCTL, PCH_START);
313 static int pch_i2c_wait_for_check_xfer(struct i2c_algo_pch_data *adap)
316 	void __iomem *p = adap->pch_base_address;
319 			(adap->pch_event_flag != 0), msecs_to_jiffies(1000));
321 		pch_err(adap, "%s:wait-event timeout\n", __func__);
322 		adap->pch_event_flag = 0;
323 		pch_i2c_stop(adap);
324 		pch_i2c_init(adap);
328 	if (adap->pch_event_flag & I2C_ERROR_MASK) {
329 		pch_err(adap, "Lost Arbitration\n");
330 		adap->pch_event_flag = 0;
331 		pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMAL_BIT);
332 		pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT);
333 		pch_i2c_init(adap);
337 	adap->pch_event_flag = 0;
340 		pch_dbg(adap, "Receive NACK for slave address setting\n");
349  * @adap:	Pointer to struct i2c_algo_pch_data.
351 static void pch_i2c_repstart(struct i2c_algo_pch_data *adap)
353 	void __iomem *p = adap->pch_base_address;
354 	pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
355 	pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_REPSTART);
371 	struct i2c_algo_pch_data *adap = i2c_adap->algo_data;
379 	void __iomem *p = adap->pch_base_address;
386 	pch_setbit(adap->pch_base_address, PCH_I2CCTL, I2C_TX_MODE);
388 	pch_dbg(adap, "I2CCTL = %x msgs->len = %d\n", ioread32(p + PCH_I2CCTL),
392 		if (pch_i2c_wait_for_bus_idle(adap, BUS_IDLE_TIMEOUT) == -ETIME)
400 			pch_i2c_start(adap);
402 		rtn = pch_i2c_wait_for_check_xfer(adap);
412 			pch_i2c_start(adap);
415 	rtn = pch_i2c_wait_for_check_xfer(adap);
422 		pch_dbg(adap, "writing %x to Data register\n", buf[wrcount]);
424 		rtn = pch_i2c_wait_for_check_xfer(adap);
428 		pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMCF_BIT);
429 		pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT);
434 		pch_i2c_stop(adap);
436 		pch_i2c_repstart(adap);
438 	pch_dbg(adap, "return=%d\n", wrcount);
445  * @adap:	Pointer to struct i2c_algo_pch_data.
447 static void pch_i2c_sendack(struct i2c_algo_pch_data *adap)
449 	void __iomem *p = adap->pch_base_address;
450 	pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
451 	pch_clrbit(adap->pch_base_address, PCH_I2CCTL, PCH_ACK);
456  * @adap:	Pointer to struct i2c_algo_pch_data.
458 static void pch_i2c_sendnack(struct i2c_algo_pch_data *adap)
460 	void __iomem *p = adap->pch_base_address;
461 	pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
462 	pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_ACK);
467  * @adap:	Pointer to struct i2c_algo_pch_data.
471 static void pch_i2c_restart(struct i2c_algo_pch_data *adap)
473 	void __iomem *p = adap->pch_base_address;
474 	pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
475 	pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_RESTART);
488 	struct i2c_algo_pch_data *adap = i2c_adap->algo_data;
496 	void __iomem *p = adap->pch_base_address;
504 	pch_clrbit(adap->pch_base_address, PCH_I2CCTL, I2C_TX_MODE);
507 		if (pch_i2c_wait_for_bus_idle(adap, BUS_IDLE_TIMEOUT) == -ETIME)
515 			pch_i2c_start(adap);
517 		rtn = pch_i2c_wait_for_check_xfer(adap);
524 		pch_i2c_restart(adap);
526 		rtn = pch_i2c_wait_for_check_xfer(adap);
539 		pch_i2c_start(adap);
541 	rtn = pch_i2c_wait_for_check_xfer(adap);
546 		pch_i2c_stop(adap);
553 		pch_i2c_sendack(adap);
562 			rtn = pch_i2c_wait_for_check_xfer(adap);
567 		pch_i2c_sendnack(adap);
574 		rtn = pch_i2c_wait_for_check_xfer(adap);
579 			pch_i2c_stop(adap);
581 			pch_i2c_repstart(adap);
592  * @adap:	Pointer to struct i2c_algo_pch_data.
594 static void pch_i2c_cb(struct i2c_algo_pch_data *adap)
597 	void __iomem *p = adap->pch_base_address;
602 		adap->pch_event_flag |= I2CMAL_EVENT;
605 		adap->pch_event_flag |= I2CMCF_EVENT;
608 	pch_clrbit(adap->pch_base_address, PCH_I2CSR, sts);
610 	pch_dbg(adap, "PCH_I2CSR = %x\n", ioread32(p + PCH_I2CSR));
662 	struct i2c_algo_pch_data *adap = i2c_adap->algo_data;
668 	if (adap->p_adapter_info->pch_i2c_suspended) {
673 	pch_dbg(adap, "adap->p_adapter_info->pch_i2c_suspended is %d\n",
674 		adap->p_adapter_info->pch_i2c_suspended);
676 	adap->pch_i2c_xfer_in_progress = true;
680 		pmsg->flags |= adap->pch_buff_mode_en;
682 		pch_dbg(adap,
694 	adap->pch_i2c_xfer_in_progress = false;	/* transfer completed */
703  * @adap:	Pointer to struct i2c_algo_pch_data.
705 static u32 pch_i2c_func(struct i2c_adapter *adap)
717  * @adap:	Pointer to struct i2c_algo_pch_data.
719 static void pch_i2c_disbl_int(struct i2c_algo_pch_data *adap)
721 	void __iomem *p = adap->pch_base_address;
723 	pch_clrbit(adap->pch_base_address, PCH_I2CCTL, NORMAL_INTR_ENBL);