Lines Matching defs:drvdata

29 	struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
38 drvdata->dsb->edge_ctrl[tpdm_attr->idx]);
43 drvdata->dsb->edge_ctrl_mask[tpdm_attr->idx]);
48 drvdata->dsb->trig_patt[tpdm_attr->idx]);
53 drvdata->dsb->trig_patt_mask[tpdm_attr->idx]);
58 drvdata->dsb->patt_val[tpdm_attr->idx]);
63 drvdata->dsb->patt_mask[tpdm_attr->idx]);
65 if (tpdm_attr->idx >= drvdata->dsb_msr_num)
68 drvdata->dsb->msr[tpdm_attr->idx]);
73 drvdata->cmb->trig_patt[tpdm_attr->idx]);
78 drvdata->cmb->trig_patt_mask[tpdm_attr->idx]);
83 drvdata->cmb->patt_val[tpdm_attr->idx]);
88 drvdata->cmb->patt_mask[tpdm_attr->idx]);
90 if (tpdm_attr->idx >= drvdata->cmb_msr_num)
93 drvdata->cmb->msr[tpdm_attr->idx]);
107 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
114 guard(spinlock)(&drvdata->spinlock);
118 drvdata->dsb->trig_patt[tpdm_attr->idx] = val;
124 drvdata->dsb->trig_patt_mask[tpdm_attr->idx] = val;
130 drvdata->dsb->patt_val[tpdm_attr->idx] = val;
136 drvdata->dsb->patt_mask[tpdm_attr->idx] = val;
141 if (tpdm_attr->idx < drvdata->dsb_msr_num) {
142 drvdata->dsb->msr[tpdm_attr->idx] = val;
148 drvdata->cmb->trig_patt[tpdm_attr->idx] = val;
154 drvdata->cmb->trig_patt_mask[tpdm_attr->idx] = val;
160 drvdata->cmb->patt_val[tpdm_attr->idx] = val;
166 drvdata->cmb->patt_mask[tpdm_attr->idx] = val;
171 if (tpdm_attr->idx < drvdata->cmb_msr_num) {
172 drvdata->cmb->msr[tpdm_attr->idx] = val;
187 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
189 if (drvdata && tpdm_has_dsb_dataset(drvdata))
199 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
201 if (drvdata && tpdm_has_cmb_dataset(drvdata))
211 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
217 if (tpdm_attr->idx < drvdata->dsb_msr_num)
227 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
234 if (tpdm_attr->idx < drvdata->cmb_msr_num)
240 static void tpdm_reset_datasets(struct tpdm_drvdata *drvdata)
242 if (tpdm_has_dsb_dataset(drvdata)) {
243 memset(drvdata->dsb, 0, sizeof(struct dsb_dataset));
245 drvdata->dsb->trig_ts = true;
246 drvdata->dsb->trig_type = false;
249 if (drvdata->cmb)
250 memset(drvdata->cmb, 0, sizeof(struct cmb_dataset));
253 static void set_dsb_mode(struct tpdm_drvdata *drvdata, u32 *val)
258 mode = TPDM_DSB_MODE_TEST(drvdata->dsb->mode);
263 mode = TPDM_DSB_MODE_HPBYTESEL(drvdata->dsb->mode);
268 if (drvdata->dsb->mode & TPDM_DSB_MODE_PERF)
274 static void set_dsb_tier(struct tpdm_drvdata *drvdata)
278 val = readl_relaxed(drvdata->base + TPDM_DSB_TIER);
285 if (drvdata->dsb->patt_ts) {
287 if (drvdata->dsb->patt_type)
296 if (drvdata->dsb->trig_ts)
301 writel_relaxed(val, drvdata->base + TPDM_DSB_TIER);
304 static void set_dsb_msr(struct tpdm_drvdata *drvdata)
308 for (i = 0; i < drvdata->dsb_msr_num; i++)
309 writel_relaxed(drvdata->dsb->msr[i],
310 drvdata->base + TPDM_DSB_MSR(i));
313 static void tpdm_enable_dsb(struct tpdm_drvdata *drvdata)
317 if (!tpdm_has_dsb_dataset(drvdata))
321 writel_relaxed(drvdata->dsb->edge_ctrl[i],
322 drvdata->base + TPDM_DSB_EDCR(i));
324 writel_relaxed(drvdata->dsb->edge_ctrl_mask[i],
325 drvdata->base + TPDM_DSB_EDCMR(i));
327 writel_relaxed(drvdata->dsb->patt_val[i],
328 drvdata->base + TPDM_DSB_TPR(i));
329 writel_relaxed(drvdata->dsb->patt_mask[i],
330 drvdata->base + TPDM_DSB_TPMR(i));
331 writel_relaxed(drvdata->dsb->trig_patt[i],
332 drvdata->base + TPDM_DSB_XPR(i));
333 writel_relaxed(drvdata->dsb->trig_patt_mask[i],
334 drvdata->base + TPDM_DSB_XPMR(i));
337 set_dsb_tier(drvdata);
338 set_dsb_msr(drvdata);
340 val = readl_relaxed(drvdata->base + TPDM_DSB_CR);
342 set_dsb_mode(drvdata, &val);
344 if (drvdata->dsb->trig_type)
350 writel_relaxed(val, drvdata->base + TPDM_DSB_CR);
353 static void set_cmb_tier(struct tpdm_drvdata *drvdata)
357 val = readl_relaxed(drvdata->base + TPDM_CMB_TIER);
364 if (drvdata->cmb->patt_ts)
368 if (drvdata->cmb->trig_ts)
372 if (drvdata->cmb->ts_all)
375 writel_relaxed(val, drvdata->base + TPDM_CMB_TIER);
378 static void set_cmb_msr(struct tpdm_drvdata *drvdata)
382 for (i = 0; i < drvdata->cmb_msr_num; i++)
383 writel_relaxed(drvdata->cmb->msr[i],
384 drvdata->base + TPDM_CMB_MSR(i));
387 static void tpdm_enable_cmb(struct tpdm_drvdata *drvdata)
391 if (!tpdm_has_cmb_dataset(drvdata))
396 writel_relaxed(drvdata->cmb->patt_val[i],
397 drvdata->base + TPDM_CMB_TPR(i));
398 writel_relaxed(drvdata->cmb->patt_mask[i],
399 drvdata->base + TPDM_CMB_TPMR(i));
400 writel_relaxed(drvdata->cmb->trig_patt[i],
401 drvdata->base + TPDM_CMB_XPR(i));
402 writel_relaxed(drvdata->cmb->trig_patt_mask[i],
403 drvdata->base + TPDM_CMB_XPMR(i));
406 set_cmb_tier(drvdata);
407 set_cmb_msr(drvdata);
409 val = readl_relaxed(drvdata->base + TPDM_CMB_CR);
414 if (drvdata->cmb->trace_mode)
420 writel_relaxed(val, drvdata->base + TPDM_CMB_CR);
431 static void __tpdm_enable(struct tpdm_drvdata *drvdata)
433 CS_UNLOCK(drvdata->base);
435 tpdm_enable_dsb(drvdata);
436 tpdm_enable_cmb(drvdata);
438 CS_LOCK(drvdata->base);
444 struct tpdm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
446 spin_lock(&drvdata->spinlock);
447 if (drvdata->enable) {
448 spin_unlock(&drvdata->spinlock);
452 __tpdm_enable(drvdata);
453 drvdata->enable = true;
454 spin_unlock(&drvdata->spinlock);
456 dev_dbg(drvdata->dev, "TPDM tracing enabled\n");
460 static void tpdm_disable_dsb(struct tpdm_drvdata *drvdata)
464 if (!tpdm_has_dsb_dataset(drvdata))
468 val = readl_relaxed(drvdata->base + TPDM_DSB_CR);
470 writel_relaxed(val, drvdata->base + TPDM_DSB_CR);
473 static void tpdm_disable_cmb(struct tpdm_drvdata *drvdata)
477 if (!tpdm_has_cmb_dataset(drvdata))
480 val = readl_relaxed(drvdata->base + TPDM_CMB_CR);
483 writel_relaxed(val, drvdata->base + TPDM_CMB_CR);
487 static void __tpdm_disable(struct tpdm_drvdata *drvdata)
489 CS_UNLOCK(drvdata->base);
491 tpdm_disable_dsb(drvdata);
492 tpdm_disable_cmb(drvdata);
494 CS_LOCK(drvdata->base);
500 struct tpdm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
502 spin_lock(&drvdata->spinlock);
503 if (!drvdata->enable) {
504 spin_unlock(&drvdata->spinlock);
508 __tpdm_disable(drvdata);
509 drvdata->enable = false;
510 spin_unlock(&drvdata->spinlock);
512 dev_dbg(drvdata->dev, "TPDM tracing disabled\n");
524 static int tpdm_datasets_setup(struct tpdm_drvdata *drvdata)
529 pidr = readl_relaxed(drvdata->base + CORESIGHT_PERIPHIDR0);
530 drvdata->datasets |= pidr & GENMASK(TPDM_DATASETS - 1, 0);
532 if (tpdm_has_dsb_dataset(drvdata) && (!drvdata->dsb)) {
533 drvdata->dsb = devm_kzalloc(drvdata->dev,
534 sizeof(*drvdata->dsb), GFP_KERNEL);
535 if (!drvdata->dsb)
538 if (tpdm_has_cmb_dataset(drvdata) && (!drvdata->cmb)) {
539 drvdata->cmb = devm_kzalloc(drvdata->dev,
540 sizeof(*drvdata->cmb), GFP_KERNEL);
541 if (!drvdata->cmb)
544 tpdm_reset_datasets(drvdata);
556 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
562 spin_lock(&drvdata->spinlock);
563 tpdm_reset_datasets(drvdata);
564 spin_unlock(&drvdata->spinlock);
581 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
590 if (!drvdata->enable)
597 CS_UNLOCK(drvdata->base);
598 writel_relaxed(0x1, drvdata->base + TPDM_ITCNTRL);
601 writel_relaxed(val, drvdata->base + TPDM_ITATBCNTRL);
603 writel_relaxed(0, drvdata->base + TPDM_ITCNTRL);
604 CS_LOCK(drvdata->base);
623 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
625 return sysfs_emit(buf, "%x\n", drvdata->dsb->mode);
633 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
640 spin_lock(&drvdata->spinlock);
641 drvdata->dsb->mode = val & TPDM_DSB_MODE_MASK;
642 spin_unlock(&drvdata->spinlock);
651 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
654 (unsigned int)drvdata->dsb->edge_ctrl_idx);
669 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
675 spin_lock(&drvdata->spinlock);
676 drvdata->dsb->edge_ctrl_idx = val;
677 spin_unlock(&drvdata->spinlock);
696 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
703 spin_lock(&drvdata->spinlock);
708 reg = EDCR_TO_WORD_IDX(drvdata->dsb->edge_ctrl_idx);
709 val = drvdata->dsb->edge_ctrl[reg];
710 val &= ~EDCR_TO_WORD_MASK(drvdata->dsb->edge_ctrl_idx);
711 val |= EDCR_TO_WORD_VAL(edge_ctrl, drvdata->dsb->edge_ctrl_idx);
712 drvdata->dsb->edge_ctrl[reg] = val;
713 spin_unlock(&drvdata->spinlock);
724 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
732 spin_lock(&drvdata->spinlock);
737 reg = EDCMR_TO_WORD_IDX(drvdata->dsb->edge_ctrl_idx);
738 set = drvdata->dsb->edge_ctrl_mask[reg];
740 set |= BIT(EDCMR_TO_WORD_SHIFT(drvdata->dsb->edge_ctrl_idx));
742 set &= ~BIT(EDCMR_TO_WORD_SHIFT(drvdata->dsb->edge_ctrl_idx));
743 drvdata->dsb->edge_ctrl_mask[reg] = set;
744 spin_unlock(&drvdata->spinlock);
754 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
761 (unsigned int)drvdata->dsb->patt_ts);
764 (unsigned int)drvdata->cmb->patt_ts);
777 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
785 guard(spinlock)(&drvdata->spinlock);
787 drvdata->dsb->patt_ts = !!val;
789 drvdata->cmb->patt_ts = !!val;
800 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
803 (unsigned int)drvdata->dsb->patt_type);
813 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
819 spin_lock(&drvdata->spinlock);
820 drvdata->dsb->patt_type = val;
821 spin_unlock(&drvdata->spinlock);
829 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
832 (unsigned int)drvdata->dsb->trig_type);
845 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
851 spin_lock(&drvdata->spinlock);
853 drvdata->dsb->trig_type = true;
855 drvdata->dsb->trig_type = false;
856 spin_unlock(&drvdata->spinlock);
865 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
868 (unsigned int)drvdata->dsb->trig_ts);
881 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
887 spin_lock(&drvdata->spinlock);
889 drvdata->dsb->trig_ts = true;
891 drvdata->dsb->trig_ts = false;
892 spin_unlock(&drvdata->spinlock);
901 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
903 return sysfs_emit(buf, "%x\n", drvdata->cmb->trace_mode);
912 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
918 spin_lock(&drvdata->spinlock);
919 drvdata->cmb->trace_mode = trace_mode;
920 spin_unlock(&drvdata->spinlock);
929 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
932 (unsigned int)drvdata->cmb->ts_all);
940 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
946 guard(spinlock)(&drvdata->spinlock);
948 drvdata->cmb->ts_all = true;
950 drvdata->cmb->ts_all = false;
960 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
963 (unsigned int)drvdata->cmb->trig_ts);
971 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
977 guard(spinlock)(&drvdata->spinlock);
979 drvdata->cmb->trig_ts = true;
981 drvdata->cmb->trig_ts = false;
1234 struct tpdm_drvdata *drvdata;
1244 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
1245 if (!drvdata)
1247 drvdata->dev = &adev->dev;
1248 dev_set_drvdata(dev, drvdata);
1254 drvdata->base = base;
1256 ret = tpdm_datasets_setup(drvdata);
1260 if (drvdata && tpdm_has_dsb_dataset(drvdata))
1261 of_property_read_u32(drvdata->dev->of_node,
1262 "qcom,dsb-msrs-num", &drvdata->dsb_msr_num);
1264 if (drvdata && tpdm_has_cmb_dataset(drvdata))
1265 of_property_read_u32(drvdata->dev->of_node,
1266 "qcom,cmb-msrs-num", &drvdata->cmb_msr_num);
1279 drvdata->csdev = coresight_register(&desc);
1280 if (IS_ERR(drvdata->csdev))
1281 return PTR_ERR(drvdata->csdev);
1283 spin_lock_init(&drvdata->spinlock);
1293 struct tpdm_drvdata *drvdata = dev_get_drvdata(&adev->dev);
1295 coresight_unregister(drvdata->csdev);