Lines Matching defs:duty_cycle
127 u8 duty_cycle; /* The DUTY_CYCLE register is a 4-bit read/
178 data->duty_cycle = ret & 0x0f;
378 pwm = tc654_pwm_map[data->duty_cycle];
392 data->duty_cycle = 0;
395 data->duty_cycle = val - 1;
403 data->duty_cycle);
463 * State 1 = 30% PWM | duty_cycle = 0
464 * State 2 = ~35% PWM | duty_cycle = 1
466 * State 15 = ~95% PWM | duty_cycle = 14
467 * State 16 = 100% PWM | duty_cycle = 15
487 *state = data->duty_cycle + 1; /* offset PWM States by 1 */