gpu/ipu-v3/ipu-dmfc.c

101 int ipu_dmfc_enable_channel(struct dmfc_channel *dmfc)
103 	struct ipu_dmfc_priv *priv = dmfc->priv;
117 void ipu_dmfc_disable_channel(struct dmfc_channel *dmfc)
119 	struct ipu_dmfc_priv *priv = dmfc->priv;
135 void ipu_dmfc_config_wait4eot(struct dmfc_channel *dmfc, int width)
137 	struct ipu_dmfc_priv *priv = dmfc->priv;
144 	if ((dmfc->slots * 64 * 4) / width > dmfc->data->max_fifo_lines)
145 		dmfc_gen1 |= 1 << dmfc->data->eot_shift;
147 		dmfc_gen1 &= ~(1 << dmfc->data->eot_shift);
167 void ipu_dmfc_put(struct dmfc_channel *dmfc)