Lines Matching refs:u64
57 u64 force_vram_bar_size = xe_modparam.force_vram_bar_size;
85 (u64)rebar_size >> 20, bar_size_mask, (u64)current_size >> 20);
102 (u64)current_size >> 20, (u64)rebar_size >> 20);
109 (u64)root_res->start > 0x100000000ul)
166 static inline u64 get_flat_ccs_offset(struct xe_gt *gt, u64 tile_size)
169 u64 offset;
173 u64 ccs_size = tile_size / 512;
174 u64 offset_hi, offset_lo;
196 offset = (u64)REG_FIELD_GET(XEHP_FLAT_CCS_PTR, reg) * SZ_64K;
221 static int xe_mmio_tile_vram_size(struct xe_tile *tile, u64 *vram_size,
222 u64 *tile_size, u64 *tile_offset)
226 u64 offset;
240 *tile_size = (u64)REG_FIELD_GET(GENMASK(14, 8), reg) * SZ_1G;
241 *tile_offset = (u64)REG_FIELD_GET(GENMASK(7, 1), reg) * SZ_1G;
261 u64 available_size = 0;
262 u64 total_size = 0;
263 u64 tile_offset;
264 u64 tile_size;
265 u64 vram_size;
295 tile->mem.vram.io_size = min_t(u64, vram_size, io_size);
311 &tile->mem.vram.dpa_base, tile->mem.vram.dpa_base + (u64)tile->mem.vram.actual_physical_size,
312 &tile->mem.vram.io_start, tile->mem.vram.io_start + (u64)tile->mem.vram.io_size);
323 io_size -= min_t(u64, tile_size, io_size);
517 u64 xe_mmio_read64_2x32(struct xe_gt *gt, struct xe_reg reg)
541 return (u64)udw << 32 | ldw;