Lines Matching defs:gt

60 	struct xe_gt *gt;
62 gt = drmm_kzalloc(&tile_to_xe(tile)->drm, sizeof(*gt), GFP_KERNEL);
63 if (!gt)
66 gt->tile = tile;
67 gt->ordered_wq = alloc_ordered_workqueue("gt-ordered-wq", 0);
69 return gt;
72 void xe_gt_sanitize(struct xe_gt *gt)
78 gt->uc.guc.submission_state.enabled = false;
83 * @gt: the GT object
89 void xe_gt_remove(struct xe_gt *gt)
91 xe_uc_remove(&gt->uc);
96 struct xe_gt *gt = arg;
99 destroy_workqueue(gt->ordered_wq);
102 xe_hw_fence_irq_finish(&gt->fence_irq[i]);
107 static int emit_nop_job(struct xe_gt *gt, struct xe_exec_queue *q)
114 bb = xe_bb_new(gt, 4, false);
148 static int emit_wa_job(struct xe_gt *gt, struct xe_exec_queue *q)
161 bb = xe_bb_new(gt, xe_lrc_size(gt_to_xe(gt), q->hwe->class), false);
164 bb = xe_bb_new(gt, SZ_4K, false);
173 xe_gt_dbg(gt, "LRC WA %s save-restore batch\n", sr->name);
189 xe_gt_mcr_unicast_read_any(gt, reg_mcr) :
190 xe_mmio_read32(gt, reg)) & (~entry->clr_bits);
198 xe_gt_dbg(gt, "REG[0x%x] = 0x%08x", reg.addr, val);
225 int xe_gt_record_default_lrcs(struct xe_gt *gt)
227 struct xe_device *xe = gt_to_xe(gt);
232 for_each_hw_engine(hwe, gt, id) {
236 if (gt->default_lrc[hwe->class])
254 xe_gt_err(gt, "hwe %s: xe_exec_queue_create failed (%pe)\n",
260 err = emit_wa_job(gt, q);
262 xe_gt_err(gt, "hwe %s: emit_wa_job failed (%pe) guc_id=%u\n",
271 xe_gt_err(gt, "hwe %s: nop xe_exec_queue_create failed (%pe)\n",
277 err = emit_nop_job(gt, nop_q);
279 xe_gt_err(gt, "hwe %s: nop emit_nop_job failed (%pe) guc_id=%u\n",
285 err = emit_nop_job(gt, q);
287 xe_gt_err(gt, "hwe %s: emit_nop_job failed (%pe) guc_id=%u\n",
297 gt->default_lrc[hwe->class] = default_lrc;
309 int xe_gt_init_early(struct xe_gt *gt)
313 err = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
317 err = xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
321 xe_reg_sr_init(&gt->reg_sr, "GT", gt_to_xe(gt));
323 err = xe_wa_init(gt);
327 xe_wa_process_gt(gt);
328 xe_wa_process_oob(gt);
329 xe_tuning_process_gt(gt);
334 static void dump_pat_on_error(struct xe_gt *gt)
339 snprintf(prefix, sizeof(prefix), "[GT%u Error]", gt->info.id);
340 p = drm_dbg_printer(&gt_to_xe(gt)->drm, DRM_UT_DRIVER, prefix);
342 xe_pat_dump(gt, &p);
345 static int gt_fw_domain_init(struct xe_gt *gt)
349 xe_device_mem_access_get(gt_to_xe(gt));
350 err = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
354 if (!xe_gt_is_media_type(gt)) {
355 err = xe_ggtt_init(gt_to_tile(gt)->mem.ggtt);
358 if (IS_SRIOV_PF(gt_to_xe(gt)))
359 xe_lmtt_init(&gt_to_tile(gt)->sriov.pf.lmtt);
362 xe_gt_idle_sysfs_init(&gt->gtidle);
365 xe_irq_enable_hwe(gt);
368 xe_gt_mcr_init(gt);
370 err = xe_hw_engines_init_early(gt);
374 err = xe_hw_engine_class_sysfs_init(gt);
376 drm_warn(&gt_to_xe(gt)->drm,
381 err = xe_gt_ccs_mode_sysfs_init(gt);
389 gt->info.gmdid = xe_mmio_read32(gt, GMD_ID);
391 err = xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
393 xe_device_mem_access_put(gt_to_xe(gt));
398 dump_pat_on_error(gt);
399 xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
402 xe_hw_fence_irq_finish(&gt->fence_irq[i]);
403 xe_device_mem_access_put(gt_to_xe(gt));
408 static int all_fw_domain_init(struct xe_gt *gt)
412 xe_device_mem_access_get(gt_to_xe(gt));
413 err = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
417 xe_gt_mcr_set_implicit_defaults(gt);
418 xe_reg_sr_apply_mmio(&gt->reg_sr, gt);
420 err = xe_gt_clock_init(gt);
424 xe_mocs_init(gt);
425 err = xe_execlist_init(gt);
429 err = xe_hw_engines_init(gt);
433 if (!xe_gt_is_media_type(gt)) {
437 if (gt_to_xe(gt)->info.has_usm) {
438 struct xe_device *xe = gt_to_xe(gt);
440 gt->usm.bb_pool = xe_sa_bo_manager_init(gt_to_tile(gt),
442 if (IS_ERR(gt->usm.bb_pool)) {
443 err = PTR_ERR(gt->usm.bb_pool);
449 if (!xe_gt_is_media_type(gt)) {
450 struct xe_tile *tile = gt_to_tile(gt);
459 err = xe_uc_init_post_hwconfig(&gt->uc);
463 err = xe_uc_init_hw(&gt->uc);
468 if (xe_gt_ccs_mode_enabled(gt)) {
469 gt->ccs_mode = 1;
470 xe_gt_apply_ccs_mode(gt);
473 if (IS_SRIOV_PF(gt_to_xe(gt)) && !xe_gt_is_media_type(gt))
474 xe_lmtt_init_hw(&gt_to_tile(gt)->sriov.pf.lmtt);
476 err = xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL);
478 xe_device_mem_access_put(gt_to_xe(gt));
483 xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL);
486 xe_hw_fence_irq_finish(&gt->fence_irq[i]);
487 xe_device_mem_access_put(gt_to_xe(gt));
496 int xe_gt_init_hwconfig(struct xe_gt *gt)
500 xe_device_mem_access_get(gt_to_xe(gt));
501 err = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
505 xe_gt_topology_init(gt);
506 xe_gt_mcr_init(gt);
507 xe_pat_init(gt);
509 err = xe_uc_init(&gt->uc);
513 err = xe_uc_init_hwconfig(&gt->uc);
518 gt->info.engine_mask = gt->info.__engine_mask;
521 xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
523 xe_device_mem_access_put(gt_to_xe(gt));
528 int xe_gt_init(struct xe_gt *gt)
533 INIT_WORK(&gt->reset.worker, gt_reset_worker);
536 gt->ring_ops[i] = xe_ring_ops_get(gt, i);
537 xe_hw_fence_irq_init(&gt->fence_irq[i]);
540 err = xe_gt_tlb_invalidation_init(gt);
544 err = xe_gt_pagefault_init(gt);
548 xe_mocs_init_early(gt);
550 xe_gt_sysfs_init(gt);
552 err = gt_fw_domain_init(gt);
556 xe_gt_freq_init(gt);
558 xe_force_wake_init_engines(gt, gt_to_fw(gt));
560 err = all_fw_domain_init(gt);
564 err = drmm_add_action_or_reset(&gt_to_xe(gt)->drm, gt_fini, gt);
571 static int do_gt_reset(struct xe_gt *gt)
575 xe_gsc_wa_14015076503(gt, true);
577 xe_mmio_write32(gt, GDRST, GRDOM_FULL);
578 err = xe_mmio_wait32(gt, GDRST, GRDOM_FULL, 0, 5000, NULL, false);
580 xe_gt_err(gt, "failed to clear GRDOM_FULL (%pe)\n",
583 xe_gsc_wa_14015076503(gt, false);
588 static int do_gt_restart(struct xe_gt *gt)
594 xe_pat_init(gt);
596 xe_gt_mcr_set_implicit_defaults(gt);
597 xe_reg_sr_apply_mmio(&gt->reg_sr, gt);
599 err = xe_wopcm_init(&gt->uc.wopcm);
603 for_each_hw_engine(hwe, gt, id)
606 err = xe_uc_sanitize_reset(&gt->uc);
610 err = xe_uc_init_hw(&gt->uc);
614 if (IS_SRIOV_PF(gt_to_xe(gt)) && !xe_gt_is_media_type(gt))
615 xe_lmtt_init_hw(&gt_to_tile(gt)->sriov.pf.lmtt);
617 xe_mocs_init(gt);
618 err = xe_uc_start(&gt->uc);
622 for_each_hw_engine(hwe, gt, id) {
623 xe_reg_sr_apply_mmio(&hwe->reg_sr, gt);
628 xe_gt_apply_ccs_mode(gt);
633 static int gt_reset(struct xe_gt *gt)
638 if (!xe_device_uc_enabled(gt_to_xe(gt)))
641 xe_gt_info(gt, "reset started\n");
648 xe_gt_sanitize(gt);
650 xe_device_mem_access_get(gt_to_xe(gt));
651 err = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
655 xe_uc_gucrc_disable(&gt->uc);
656 xe_uc_stop_prepare(&gt->uc);
657 xe_gt_pagefault_reset(gt);
659 err = xe_uc_stop(&gt->uc);
663 xe_gt_tlb_invalidation_reset(gt);
665 err = do_gt_reset(gt);
669 err = do_gt_restart(gt);
673 err = xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL);
674 xe_device_mem_access_put(gt_to_xe(gt));
677 xe_gt_info(gt, "reset done\n");
682 XE_WARN_ON(xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL));
684 XE_WARN_ON(xe_uc_start(&gt->uc));
685 xe_device_mem_access_put(gt_to_xe(gt));
687 xe_gt_err(gt, "reset failed (%pe)\n", ERR_PTR(err));
689 gt_to_xe(gt)->needs_flr_on_fini = true;
696 struct xe_gt *gt = container_of(w, typeof(*gt), reset.worker);
698 gt_reset(gt);
701 void xe_gt_reset_async(struct xe_gt *gt)
703 xe_gt_info(gt, "trying reset\n");
706 if (!xe_fault_inject_gt_reset() && xe_uc_reset_prepare(&gt->uc))
709 xe_gt_info(gt, "reset queued\n");
710 queue_work(gt->ordered_wq, &gt->reset.worker);
713 void xe_gt_suspend_prepare(struct xe_gt *gt)
715 xe_device_mem_access_get(gt_to_xe(gt));
716 XE_WARN_ON(xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL));
718 xe_uc_stop_prepare(&gt->uc);
720 XE_WARN_ON(xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL));
721 xe_device_mem_access_put(gt_to_xe(gt));
724 int xe_gt_suspend(struct xe_gt *gt)
728 xe_gt_sanitize(gt);
730 xe_device_mem_access_get(gt_to_xe(gt));
731 err = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
735 err = xe_uc_suspend(&gt->uc);
739 XE_WARN_ON(xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL));
740 xe_device_mem_access_put(gt_to_xe(gt));
741 xe_gt_info(gt, "suspended\n");
746 XE_WARN_ON(xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL));
748 xe_device_mem_access_put(gt_to_xe(gt));
749 xe_gt_err(gt, "suspend failed (%pe)\n", ERR_PTR(err));
754 int xe_gt_resume(struct xe_gt *gt)
758 xe_device_mem_access_get(gt_to_xe(gt));
759 err = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
763 err = do_gt_restart(gt);
767 XE_WARN_ON(xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL));
768 xe_device_mem_access_put(gt_to_xe(gt));
769 xe_gt_info(gt, "resumed\n");
774 XE_WARN_ON(xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL));
776 xe_device_mem_access_put(gt_to_xe(gt));
777 xe_gt_err(gt, "resume failed (%pe)\n", ERR_PTR(err));
782 struct xe_hw_engine *xe_gt_hw_engine(struct xe_gt *gt,
789 for_each_hw_engine(hwe, gt, id)
798 struct xe_hw_engine *xe_gt_any_hw_engine_by_reset_domain(struct xe_gt *gt,
804 for_each_hw_engine(hwe, gt, id) {