Lines Matching refs:tilcdc_write
107 tilcdc_write(dev, LCDC_DMA_FB_BASE_ADDR_0_REG,
109 tilcdc_write(dev, LCDC_DMA_FB_CEILING_ADDR_0_REG,
122 tilcdc_write(dev, LCDC_INT_ENABLE_SET_REG, LCDC_V2_PL_INT_ENA);
138 tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, LCDC_V2_PL_INT_ENA);
152 tilcdc_write(dev, LCDC_INT_ENABLE_SET_REG,
170 tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG,
258 tilcdc_write(dev, LCDC_CTRL_REG, LCDC_CLK_DIVISOR(clkdiv) |
312 tilcdc_write(dev, LCDC_DMA_CTRL_REG, reg);
341 tilcdc_write(dev, LCDC_RASTER_TIMING_2_REG, reg);
349 tilcdc_write(dev, LCDC_RASTER_TIMING_0_REG, reg);
355 tilcdc_write(dev, LCDC_RASTER_TIMING_1_REG, reg);
399 tilcdc_write(dev, LCDC_RASTER_CTRL_REG, reg);
743 tilcdc_write(dev, LCDC_INT_ENABLE_SET_REG, LCDC_FRAME_DONE);
966 tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG,
990 tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG,
1011 tilcdc_write(dev, LCDC_END_OF_INT_IND_REG, 0);