drm/tidss/tidss_dispc.c

548 static dispc_irq_t dispc_vp_irq_from_raw(u32 stat, u32 hw_videoport)
552 	if (stat & BIT(0))
554 	if (stat & BIT(1))
556 	if (stat & BIT(2))
558 	if (stat & BIT(4))
566 	u32 stat = 0;
569 		stat |= BIT(0);
571 		stat |= BIT(1);
573 		stat |= BIT(2);
575 		stat |= BIT(4);
577 	return stat;
580 static dispc_irq_t dispc_vid_irq_from_raw(u32 stat, u32 hw_plane)
584 	if (stat & BIT(0))
592 	u32 stat = 0;
595 		stat |= BIT(0);
597 	return stat;
603 	u32 stat = dispc_vp_read(dispc, hw_videoport, DISPC_VP_K2G_IRQSTATUS);
605 	return dispc_vp_irq_from_raw(stat, hw_videoport);
611 	u32 stat = dispc_vp_irq_to_raw(vpstat, hw_videoport);
613 	dispc_vp_write(dispc, hw_videoport, DISPC_VP_K2G_IRQSTATUS, stat);
619 	u32 stat = dispc_vid_read(dispc, hw_plane, DISPC_VID_K2G_IRQSTATUS);
621 	return dispc_vid_irq_from_raw(stat, hw_plane);
627 	u32 stat = dispc_vid_irq_to_raw(vidstat, hw_plane);
629 	dispc_vid_write(dispc, hw_plane, DISPC_VID_K2G_IRQSTATUS, stat);
635 	u32 stat = dispc_vp_read(dispc, hw_videoport, DISPC_VP_K2G_IRQENABLE);
637 	return dispc_vp_irq_from_raw(stat, hw_videoport);
643 	u32 stat = dispc_vp_irq_to_raw(vpstat, hw_videoport);
645 	dispc_vp_write(dispc, hw_videoport, DISPC_VP_K2G_IRQENABLE, stat);
651 	u32 stat = dispc_vid_read(dispc, hw_plane, DISPC_VID_K2G_IRQENABLE);
653 	return dispc_vid_irq_from_raw(stat, hw_plane);
659 	u32 stat = dispc_vid_irq_to_raw(vidstat, hw_plane);
661 	dispc_vid_write(dispc, hw_plane, DISPC_VID_K2G_IRQENABLE, stat);
674 	dispc_irq_t stat = 0;
680 	stat |= dispc_k2g_vp_read_irqstatus(dispc, 0);
681 	stat |= dispc_k2g_vid_read_irqstatus(dispc, 0);
683 	dispc_k2g_clear_irqstatus(dispc, stat);
685 	return stat;
690 	dispc_irq_t stat = 0;
692 	stat |= dispc_k2g_vp_read_irqenable(dispc, 0);
693 	stat |= dispc_k2g_vid_read_irqenable(dispc, 0);
695 	return stat;
718 	u32 stat = dispc_read(dispc, DISPC_VP_IRQSTATUS(hw_videoport));
720 	return dispc_vp_irq_from_raw(stat, hw_videoport);
726 	u32 stat = dispc_vp_irq_to_raw(vpstat, hw_videoport);
728 	dispc_write(dispc, DISPC_VP_IRQSTATUS(hw_videoport), stat);
734 	u32 stat = dispc_read(dispc, DISPC_VID_IRQSTATUS(hw_plane));
736 	return dispc_vid_irq_from_raw(stat, hw_plane);
742 	u32 stat = dispc_vid_irq_to_raw(vidstat, hw_plane);
744 	dispc_write(dispc, DISPC_VID_IRQSTATUS(hw_plane), stat);
750 	u32 stat = dispc_read(dispc, DISPC_VP_IRQENABLE(hw_videoport));
752 	return dispc_vp_irq_from_raw(stat, hw_videoport);
758 	u32 stat = dispc_vp_irq_to_raw(vpstat, hw_videoport);
760 	dispc_write(dispc, DISPC_VP_IRQENABLE(hw_videoport), stat);
766 	u32 stat = dispc_read(dispc, DISPC_VID_IRQENABLE(hw_plane));
768 	return dispc_vid_irq_from_raw(stat, hw_plane);
774 	u32 stat = dispc_vid_irq_to_raw(vidstat, hw_plane);
776 	dispc_write(dispc, DISPC_VID_IRQENABLE(hw_plane), stat);