drm/sun4i/sun4i_frontend.c

79 static void sun4i_frontend_scaler_init(struct sun4i_frontend *frontend)
83 	if (frontend->data->has_coef_access_ctrl)
84 		regmap_write_bits(frontend->regs, SUN4I_FRONTEND_FRM_CTRL_REG,
89 		regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZCOEF0_REG(i),
91 		regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZCOEF0_REG(i),
93 		regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZCOEF1_REG(i),
95 		regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZCOEF1_REG(i),
97 		regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTCOEF_REG(i),
99 		regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTCOEF_REG(i),
103 	if (frontend->data->has_coef_rdy)
104 		regmap_write_bits(frontend->regs,
110 int sun4i_frontend_init(struct sun4i_frontend *frontend)
112 	return pm_runtime_get_sync(frontend->dev);
116 void sun4i_frontend_exit(struct sun4i_frontend *frontend)
118 	pm_runtime_put(frontend->dev);
156 void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend,
179 		regmap_write(frontend->regs, SUN4I_FRONTEND_TB_OFF0_REG,
186 			regmap_write(frontend->regs, SUN4I_FRONTEND_TB_OFF1_REG,
194 			regmap_write(frontend->regs, SUN4I_FRONTEND_TB_OFF2_REG,
209 	regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD0_REG,
213 		regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD1_REG,
217 		regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD2_REG,
226 	regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR0_REG, dma_addr);
232 		regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR1_REG,
240 		regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR2_REG,
402 int sun4i_frontend_update_formats(struct sun4i_frontend *frontend,
446 	regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZPHASE_REG,
447 		     frontend->data->ch_phase[0]);
448 	regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZPHASE_REG,
449 		     frontend->data->ch_phase[ch1_phase_idx]);
450 	regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTPHASE0_REG,
451 		     frontend->data->ch_phase[0]);
452 	regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTPHASE0_REG,
453 		     frontend->data->ch_phase[ch1_phase_idx]);
454 	regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTPHASE1_REG,
455 		     frontend->data->ch_phase[0]);
456 	regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTPHASE1_REG,
457 		     frontend->data->ch_phase[ch1_phase_idx]);
470 			regmap_write(frontend->regs,
477 	regmap_update_bits(frontend->regs, SUN4I_FRONTEND_BYPASS_REG,
480 	regmap_write(frontend->regs, SUN4I_FRONTEND_INPUT_FMT_REG,
488 	regmap_write(frontend->regs, SUN4I_FRONTEND_OUTPUT_FMT_REG,
495 void sun4i_frontend_update_coord(struct sun4i_frontend *frontend,
513 	regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_INSIZE_REG,
515 	regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_INSIZE_REG,
518 	regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_OUTSIZE_REG,
520 	regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_OUTSIZE_REG,
523 	regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZFACT_REG,
525 	regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZFACT_REG,
528 	regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTFACT_REG,
530 	regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTFACT_REG,
533 	regmap_write_bits(frontend->regs, SUN4I_FRONTEND_FRM_CTRL_REG,
539 int sun4i_frontend_enable(struct sun4i_frontend *frontend)
541 	regmap_write_bits(frontend->regs, SUN4I_FRONTEND_FRM_CTRL_REG,
560 	struct sun4i_frontend *frontend;
565 	frontend = devm_kzalloc(dev, sizeof(*frontend), GFP_KERNEL);
566 	if (!frontend)
569 	dev_set_drvdata(dev, frontend);
570 	frontend->dev = dev;
571 	frontend->node = dev->of_node;
573 	frontend->data = of_device_get_match_data(dev);
574 	if (!frontend->data)
581 	frontend->regs = devm_regmap_init_mmio(dev, regs,
583 	if (IS_ERR(frontend->regs)) {
584 		dev_err(dev, "Couldn't create the frontend regmap\n");
585 		return PTR_ERR(frontend->regs);
588 	frontend->reset = devm_reset_control_get(dev, NULL);
589 	if (IS_ERR(frontend->reset)) {
591 		return PTR_ERR(frontend->reset);
594 	frontend->bus_clk = devm_clk_get(dev, "ahb");
595 	if (IS_ERR(frontend->bus_clk)) {
597 		return PTR_ERR(frontend->bus_clk);
600 	frontend->mod_clk = devm_clk_get(dev, "mod");
601 	if (IS_ERR(frontend->mod_clk)) {
603 		return PTR_ERR(frontend->mod_clk);
606 	frontend->ram_clk = devm_clk_get(dev, "ram");
607 	if (IS_ERR(frontend->ram_clk)) {
609 		return PTR_ERR(frontend->ram_clk);
612 	list_add_tail(&frontend->list, &drv->frontend_list);
621 	struct sun4i_frontend *frontend = dev_get_drvdata(dev);
623 	list_del(&frontend->list);
644 	struct sun4i_frontend *frontend = dev_get_drvdata(dev);
647 	clk_set_rate(frontend->mod_clk, 300000000);
649 	clk_prepare_enable(frontend->bus_clk);
650 	clk_prepare_enable(frontend->mod_clk);
651 	clk_prepare_enable(frontend->ram_clk);
653 	ret = reset_control_reset(frontend->reset);
659 	regmap_update_bits(frontend->regs, SUN4I_FRONTEND_EN_REG,
663 	sun4i_frontend_scaler_init(frontend);
670 	struct sun4i_frontend *frontend = dev_get_drvdata(dev);
672 	clk_disable_unprepare(frontend->ram_clk);
673 	clk_disable_unprepare(frontend->mod_clk);
674 	clk_disable_unprepare(frontend->bus_clk);
676 	reset_control_assert(frontend->reset);
698 		.compatible = "allwinner,sun4i-a10-display-frontend",
702 		.compatible = "allwinner,sun7i-a20-display-frontend",
706 		.compatible = "allwinner,sun8i-a23-display-frontend",
710 		.compatible = "allwinner,sun8i-a33-display-frontend",
722 		.name		= "sun4i-frontend",