drm/sti/sti_dvo.c

75  * @regs: dvo registers
76  * @clk_pix: pixel clock for dvo
77  * @clk: clock for dvo
78  * @clk_main_parent: dvo parent clock if main path used
79  * @clk_aux_parent: dvo parent clock if aux path used
81  * @panel: reference to the panel connected to the dvo
82  * @enabled: true if dvo is enabled else false
105 	struct sti_dvo *dvo;
112 static int dvo_awg_generate_code(struct sti_dvo *dvo, u8 *ram_size, u32 *ram_code)
114 	struct drm_display_mode *mode = &dvo->mode;
115 	struct dvo_config *config = dvo->config;
144  * @dvo: pointer to DVO structure
148 static void dvo_awg_configure(struct sti_dvo *dvo, u32 *awg_ram_code, int nb)
156 		       dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4);
158 		writel(0, dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4);
160 	writel(DVO_AWG_CTRL_EN, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
164 				   readl(dvo->regs + reg))
182 	struct sti_dvo *dvo = (struct sti_dvo *)node->info_ent->data;
184 	seq_printf(s, "DVO: (vaddr = 0x%p)", dvo->regs);
190 	dvo_dbg_awg_microcode(s, dvo->regs + DVO_DIGSYNC_INSTR_I);
196 	{ "dvo", dvo_dbg_show, 0, NULL },
199 static void dvo_debugfs_init(struct sti_dvo *dvo, struct drm_minor *minor)
204 		dvo_debugfs_files[i].data = dvo;
213 	struct sti_dvo *dvo = bridge->driver_private;
215 	if (!dvo->enabled)
220 	if (dvo->config->awg_fwgen_fct)
221 		writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
223 	writel(0x00000000, dvo->regs + DVO_DOF_CFG);
225 	drm_panel_disable(dvo->panel);
227 	/* Disable/unprepare dvo clock */
228 	clk_disable_unprepare(dvo->clk_pix);
229 	clk_disable_unprepare(dvo->clk);
231 	dvo->enabled = false;
236 	struct sti_dvo *dvo = bridge->driver_private;
237 	struct dvo_config *config = dvo->config;
242 	if (dvo->enabled)
246 	writel(0x00000000, dvo->regs + DVO_DOF_CFG);
247 	writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
253 		if (!dvo_awg_generate_code(dvo, &nb_instr, awg_ram_code))
254 			dvo_awg_configure(dvo, awg_ram_code, nb_instr);
260 	if (clk_prepare_enable(dvo->clk_pix))
262 	if (clk_prepare_enable(dvo->clk))
263 		DRM_ERROR("Failed to prepare/enable dvo clk\n");
265 	drm_panel_enable(dvo->panel);
268 	writel(config->lowbyte,  dvo->regs + DVO_LUT_PROG_LOW);
269 	writel(config->midbyte,  dvo->regs + DVO_LUT_PROG_MID);
270 	writel(config->highbyte, dvo->regs + DVO_LUT_PROG_HIGH);
274 	writel(val, dvo->regs + DVO_DOF_CFG);
276 	dvo->enabled = true;
283 	struct sti_dvo *dvo = bridge->driver_private;
284 	struct sti_mixer *mixer = to_sti_mixer(dvo->encoder->crtc);
291 	drm_mode_copy(&dvo->mode, mode);
293 	/* According to the path used (main or aux), the dvo clocks should
296 		clkp = dvo->clk_main_parent;
298 		clkp = dvo->clk_aux_parent;
301 		clk_set_parent(dvo->clk_pix, clkp);
302 		clk_set_parent(dvo->clk, clkp);
306 	ret = clk_set_rate(dvo->clk_pix, rate);
312 	ret = clk_set_rate(dvo->clk, rate);
314 		DRM_ERROR("Cannot set rate (%dHz) for dvo clk\n", rate);
319 	dvo->config = &rgb_24bit_de_cfg;
339 	struct sti_dvo *dvo = dvo_connector->dvo;
341 	if (dvo->panel)
342 		return drm_panel_get_modes(dvo->panel, connector);
359 	struct sti_dvo *dvo = dvo_connector->dvo;
361 	result = clk_round_rate(dvo->clk_pix, target);
367 		DRM_DEBUG_DRIVER("dvo pixclk=%d not supported\n", target);
385 	struct sti_dvo *dvo = dvo_connector->dvo;
389 	if (!dvo->panel) {
390 		dvo->panel = of_drm_find_panel(dvo->panel_node);
391 		if (IS_ERR(dvo->panel))
392 			dvo->panel = NULL;
395 	if (dvo->panel)
405 	struct sti_dvo *dvo = dvo_connector->dvo;
407 	dvo_debugfs_init(dvo, dvo->drm_dev->primary);
436 	struct sti_dvo *dvo = dev_get_drvdata(dev);
445 	dvo->drm_dev = drm_dev;
455 	connector->dvo = dvo;
461 	bridge->driver_private = dvo;
463 	bridge->of_node = dvo->dev.of_node;
470 	dvo->bridge = bridge;
472 	dvo->encoder = encoder;
499 	struct sti_dvo *dvo = dev_get_drvdata(dev);
501 	drm_bridge_remove(dvo->bridge);
512 	struct sti_dvo *dvo;
518 	dvo = devm_kzalloc(dev, sizeof(*dvo), GFP_KERNEL);
519 	if (!dvo) {
524 	dvo->dev = pdev->dev;
526 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dvo-reg");
528 		DRM_ERROR("Invalid dvo resource\n");
531 	dvo->regs = devm_ioremap(dev, res->start,
533 	if (!dvo->regs)
536 	dvo->clk_pix = devm_clk_get(dev, "dvo_pix");
537 	if (IS_ERR(dvo->clk_pix)) {
539 		return PTR_ERR(dvo->clk_pix);
542 	dvo->clk = devm_clk_get(dev, "dvo");
543 	if (IS_ERR(dvo->clk)) {
544 		DRM_ERROR("Cannot get dvo clock\n");
545 		return PTR_ERR(dvo->clk);
548 	dvo->clk_main_parent = devm_clk_get(dev, "main_parent");
549 	if (IS_ERR(dvo->clk_main_parent)) {
551 		dvo->clk_main_parent = NULL;
554 	dvo->clk_aux_parent = devm_clk_get(dev, "aux_parent");
555 	if (IS_ERR(dvo->clk_aux_parent)) {
557 		dvo->clk_aux_parent = NULL;
560 	dvo->panel_node = of_parse_phandle(np, "sti,panel", 0);
561 	if (!dvo->panel_node)
562 		DRM_ERROR("No panel associated to the dvo output\n");
563 	of_node_put(dvo->panel_node);
565 	platform_set_drvdata(pdev, dvo);
576 	{ .compatible = "st,stih407-dvo", },
583 		.name = "sti-dvo",