Lines Matching defs:rdev

293 static void trinity_program_clk_gating_hw_sequence(struct radeon_device *rdev,
295 static void trinity_override_dynamic_mg_powergating(struct radeon_device *rdev);
296 static void trinity_apply_state_adjust_rules(struct radeon_device *rdev,
307 static struct trinity_power_info *trinity_get_pi(struct radeon_device *rdev)
309 struct trinity_power_info *pi = rdev->pm.dpm.priv;
314 static void trinity_gfx_powergating_initialize(struct radeon_device *rdev)
316 struct trinity_power_info *pi = trinity_get_pi(rdev);
320 u32 xclk = radeon_get_xclk(rdev);
325 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM,
345 trinity_override_dynamic_mg_powergating(rdev);
354 static void trinity_mg_clockgating_enable(struct radeon_device *rdev,
383 static void trinity_mg_clockgating_initialize(struct radeon_device *rdev)
391 trinity_program_clk_gating_hw_sequence(rdev, seq, count);
394 static void trinity_gfx_clockgating_enable(struct radeon_device *rdev,
407 static void trinity_program_clk_gating_hw_sequence(struct radeon_device *rdev,
416 static void trinity_program_override_mgpg_sequences(struct radeon_device *rdev,
426 static void trinity_override_dynamic_mg_powergating(struct radeon_device *rdev)
434 trinity_program_override_mgpg_sequences(rdev, seq, count);
437 static void trinity_ls_clockgating_enable(struct radeon_device *rdev,
451 trinity_program_clk_gating_hw_sequence(rdev, seq, count);
454 static void trinity_gfx_powergating_enable(struct radeon_device *rdev,
468 static void trinity_gfx_dynamic_mgpg_enable(struct radeon_device *rdev,
493 trinity_gfx_dynamic_mgpg_config(rdev);
497 static void trinity_enable_clock_power_gating(struct radeon_device *rdev)
499 struct trinity_power_info *pi = trinity_get_pi(rdev);
502 sumo_gfx_clockgating_initialize(rdev);
504 trinity_mg_clockgating_initialize(rdev);
506 trinity_gfx_powergating_initialize(rdev);
508 trinity_ls_clockgating_enable(rdev, true);
509 trinity_mg_clockgating_enable(rdev, true);
512 trinity_gfx_clockgating_enable(rdev, true);
514 trinity_gfx_dynamic_mgpg_enable(rdev, true);
516 trinity_gfx_powergating_enable(rdev, true);
519 static void trinity_disable_clock_power_gating(struct radeon_device *rdev)
521 struct trinity_power_info *pi = trinity_get_pi(rdev);
524 trinity_gfx_powergating_enable(rdev, false);
526 trinity_gfx_dynamic_mgpg_enable(rdev, false);
528 trinity_gfx_clockgating_enable(rdev, false);
530 trinity_mg_clockgating_enable(rdev, false);
531 trinity_ls_clockgating_enable(rdev, false);
535 static void trinity_set_divider_value(struct radeon_device *rdev,
543 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM,
553 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM,
564 static void trinity_set_ds_dividers(struct radeon_device *rdev,
576 static void trinity_set_ss_dividers(struct radeon_device *rdev,
588 static void trinity_set_vid(struct radeon_device *rdev, u32 index, u32 vid)
590 struct trinity_power_info *pi = trinity_get_pi(rdev);
591 u32 vid_7bit = sumo_convert_vid2_to_vid7(rdev, &pi->sys_info.vid_mapping_table, vid);
606 static void trinity_set_allos_gnb_slow(struct radeon_device *rdev,
618 static void trinity_set_force_nbp_state(struct radeon_device *rdev,
630 static void trinity_set_display_wm(struct radeon_device *rdev,
642 static void trinity_set_vce_wm(struct radeon_device *rdev,
654 static void trinity_set_at(struct radeon_device *rdev,
666 static void trinity_program_power_level(struct radeon_device *rdev,
669 struct trinity_power_info *pi = trinity_get_pi(rdev);
674 trinity_set_divider_value(rdev, index, pl->sclk);
675 trinity_set_vid(rdev, index, pl->vddc_index);
676 trinity_set_ss_dividers(rdev, index, pl->ss_divider_index);
677 trinity_set_ds_dividers(rdev, index, pl->ds_divider_index);
678 trinity_set_allos_gnb_slow(rdev, index, pl->allow_gnb_slow);
679 trinity_set_force_nbp_state(rdev, index, pl->force_nbp_state);
680 trinity_set_display_wm(rdev, index, pl->display_wm);
681 trinity_set_vce_wm(rdev, index, pl->vce_wm);
682 trinity_set_at(rdev, index, pi->at[index]);
685 static void trinity_power_level_enable_disable(struct radeon_device *rdev,
698 static bool trinity_dpm_enabled(struct radeon_device *rdev)
706 static void trinity_start_dpm(struct radeon_device *rdev)
717 trinity_dpm_config(rdev, true);
720 static void trinity_wait_for_dpm_enabled(struct radeon_device *rdev)
724 for (i = 0; i < rdev->usec_timeout; i++) {
729 for (i = 0; i < rdev->usec_timeout; i++) {
734 for (i = 0; i < rdev->usec_timeout; i++) {
741 static void trinity_stop_dpm(struct radeon_device *rdev)
751 trinity_dpm_config(rdev, false);
754 static void trinity_start_am(struct radeon_device *rdev)
759 static void trinity_reset_am(struct radeon_device *rdev)
765 static void trinity_wait_for_level_0(struct radeon_device *rdev)
769 for (i = 0; i < rdev->usec_timeout; i++) {
776 static void trinity_enable_power_level_0(struct radeon_device *rdev)
778 trinity_power_level_enable_disable(rdev, 0, true);
781 static void trinity_force_level_0(struct radeon_device *rdev)
783 trinity_dpm_force_state(rdev, 0);
786 static void trinity_unforce_levels(struct radeon_device *rdev)
788 trinity_dpm_no_forced_level(rdev);
791 static void trinity_program_power_levels_0_to_n(struct radeon_device *rdev,
801 trinity_program_power_level(rdev, &new_ps->levels[i], i);
802 trinity_power_level_enable_disable(rdev, i, true);
806 trinity_power_level_enable_disable(rdev, i, false);
809 static void trinity_program_bootup_state(struct radeon_device *rdev)
811 struct trinity_power_info *pi = trinity_get_pi(rdev);
814 trinity_program_power_level(rdev, &pi->boot_pl, 0);
815 trinity_power_level_enable_disable(rdev, 0, true);
818 trinity_power_level_enable_disable(rdev, i, false);
821 static void trinity_setup_uvd_clock_table(struct radeon_device *rdev,
833 static void trinity_setup_uvd_dpm_interval(struct radeon_device *rdev,
839 u32 xclk = radeon_get_xclk(rdev);
873 static void trinity_setup_uvd_clocks(struct radeon_device *rdev,
877 struct trinity_power_info *pi = trinity_get_pi(rdev);
880 trinity_gfx_powergating_enable(rdev, false);
886 trinity_setup_uvd_dpm_interval(rdev, 0);
888 trinity_setup_uvd_clock_table(rdev, new_rps);
895 radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk);
897 trinity_setup_uvd_dpm_interval(rdev, 3000);
900 trinity_uvd_dpm_config(rdev);
906 radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk);
910 trinity_gfx_powergating_enable(rdev, true);
914 static void trinity_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev,
925 trinity_setup_uvd_clocks(rdev, new_rps, old_rps);
928 static void trinity_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev,
939 trinity_setup_uvd_clocks(rdev, new_rps, old_rps);
942 static void trinity_set_vce_clock(struct radeon_device *rdev,
950 vce_v1_0_enable_mgcg(rdev, false);
952 vce_v1_0_enable_mgcg(rdev, true);
953 radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk);
957 static void trinity_program_ttt(struct radeon_device *rdev)
959 struct trinity_power_info *pi = trinity_get_pi(rdev);
968 static void trinity_enable_att(struct radeon_device *rdev)
977 static void trinity_program_sclk_dpm(struct radeon_device *rdev)
982 u32 xclk = radeon_get_xclk(rdev);
995 static int trinity_set_thermal_temperature_range(struct radeon_device *rdev,
1013 rdev->pm.dpm.thermal.min_temp = low_temp;
1014 rdev->pm.dpm.thermal.max_temp = high_temp;
1019 static void trinity_update_current_ps(struct radeon_device *rdev,
1023 struct trinity_power_info *pi = trinity_get_pi(rdev);
1030 static void trinity_update_requested_ps(struct radeon_device *rdev,
1034 struct trinity_power_info *pi = trinity_get_pi(rdev);
1041 void trinity_dpm_enable_bapm(struct radeon_device *rdev, bool enable)
1043 struct trinity_power_info *pi = trinity_get_pi(rdev);
1046 trinity_acquire_mutex(rdev);
1047 trinity_dpm_bapm_enable(rdev, enable);
1048 trinity_release_mutex(rdev);
1052 int trinity_dpm_enable(struct radeon_device *rdev)
1054 struct trinity_power_info *pi = trinity_get_pi(rdev);
1056 trinity_acquire_mutex(rdev);
1058 if (trinity_dpm_enabled(rdev)) {
1059 trinity_release_mutex(rdev);
1063 trinity_program_bootup_state(rdev);
1064 sumo_program_vc(rdev, 0x00C00033);
1065 trinity_start_am(rdev);
1067 trinity_program_ttt(rdev);
1068 trinity_enable_att(rdev);
1070 trinity_program_sclk_dpm(rdev);
1071 trinity_start_dpm(rdev);
1072 trinity_wait_for_dpm_enabled(rdev);
1073 trinity_dpm_bapm_enable(rdev, false);
1074 trinity_release_mutex(rdev);
1076 trinity_update_current_ps(rdev, rdev->pm.dpm.boot_ps);
1081 int trinity_dpm_late_enable(struct radeon_device *rdev)
1085 trinity_acquire_mutex(rdev);
1086 trinity_enable_clock_power_gating(rdev);
1088 if (rdev->irq.installed &&
1089 r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) {
1090 ret = trinity_set_thermal_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX);
1092 trinity_release_mutex(rdev);
1095 rdev->irq.dpm_thermal = true;
1096 radeon_irq_set(rdev);
1098 trinity_release_mutex(rdev);
1103 void trinity_dpm_disable(struct radeon_device *rdev)
1105 trinity_acquire_mutex(rdev);
1106 if (!trinity_dpm_enabled(rdev)) {
1107 trinity_release_mutex(rdev);
1110 trinity_dpm_bapm_enable(rdev, false);
1111 trinity_disable_clock_power_gating(rdev);
1112 sumo_clear_vc(rdev);
1113 trinity_wait_for_level_0(rdev);
1114 trinity_stop_dpm(rdev);
1115 trinity_reset_am(rdev);
1116 trinity_release_mutex(rdev);
1118 if (rdev->irq.installed &&
1119 r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) {
1120 rdev->irq.dpm_thermal = false;
1121 radeon_irq_set(rdev);
1124 trinity_update_current_ps(rdev, rdev->pm.dpm.boot_ps);
1127 static void trinity_get_min_sclk_divider(struct radeon_device *rdev)
1129 struct trinity_power_info *pi = trinity_get_pi(rdev);
1135 static void trinity_setup_nbp_sim(struct radeon_device *rdev,
1138 struct trinity_power_info *pi = trinity_get_pi(rdev);
1153 int trinity_dpm_force_performance_level(struct radeon_device *rdev,
1156 struct trinity_power_info *pi = trinity_get_pi(rdev);
1168 ret = trinity_dpm_n_levels_disabled(rdev, ps->num_levels - 1);
1173 ret = trinity_dpm_n_levels_disabled(rdev, 0);
1179 rdev->pm.dpm.forced_level = level;
1184 int trinity_dpm_pre_set_power_state(struct radeon_device *rdev)
1186 struct trinity_power_info *pi = trinity_get_pi(rdev);
1187 struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps;
1190 trinity_update_requested_ps(rdev, new_ps);
1192 trinity_apply_state_adjust_rules(rdev,
1199 int trinity_dpm_set_power_state(struct radeon_device *rdev)
1201 struct trinity_power_info *pi = trinity_get_pi(rdev);
1205 trinity_acquire_mutex(rdev);
1208 trinity_dpm_bapm_enable(rdev, rdev->pm.dpm.ac_power);
1209 trinity_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps);
1210 trinity_enable_power_level_0(rdev);
1211 trinity_force_level_0(rdev);
1212 trinity_wait_for_level_0(rdev);
1213 trinity_setup_nbp_sim(rdev, new_ps);
1214 trinity_program_power_levels_0_to_n(rdev, new_ps, old_ps);
1215 trinity_force_level_0(rdev);
1216 trinity_unforce_levels(rdev);
1217 trinity_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps);
1218 trinity_set_vce_clock(rdev, new_ps, old_ps);
1220 trinity_release_mutex(rdev);
1225 void trinity_dpm_post_set_power_state(struct radeon_device *rdev)
1227 struct trinity_power_info *pi = trinity_get_pi(rdev);
1230 trinity_update_current_ps(rdev, new_ps);
1233 void trinity_dpm_setup_asic(struct radeon_device *rdev)
1235 trinity_acquire_mutex(rdev);
1236 sumo_program_sstp(rdev);
1237 sumo_take_smu_control(rdev, true);
1238 trinity_get_min_sclk_divider(rdev);
1239 trinity_release_mutex(rdev);
1243 void trinity_dpm_reset_asic(struct radeon_device *rdev)
1245 struct trinity_power_info *pi = trinity_get_pi(rdev);
1247 trinity_acquire_mutex(rdev);
1249 trinity_enable_power_level_0(rdev);
1250 trinity_force_level_0(rdev);
1251 trinity_wait_for_level_0(rdev);
1252 trinity_program_bootup_state(rdev);
1253 trinity_force_level_0(rdev);
1254 trinity_unforce_levels(rdev);
1256 trinity_release_mutex(rdev);
1260 static u16 trinity_convert_voltage_index_to_value(struct radeon_device *rdev,
1263 struct trinity_power_info *pi = trinity_get_pi(rdev);
1264 u32 vid_7bit = sumo_convert_vid2_to_vid7(rdev, &pi->sys_info.vid_mapping_table, vid_2bit);
1275 static void trinity_patch_boot_state(struct radeon_device *rdev,
1278 struct trinity_power_info *pi = trinity_get_pi(rdev);
1286 static u8 trinity_calculate_vce_wm(struct radeon_device *rdev, u32 sclk)
1293 static void trinity_construct_boot_state(struct radeon_device *rdev)
1295 struct trinity_power_info *pi = trinity_get_pi(rdev);
1309 static u8 trinity_get_sleep_divider_id_from_clock(struct radeon_device *rdev,
1312 struct trinity_power_info *pi = trinity_get_pi(rdev);
1333 static u32 trinity_get_valid_engine_clock(struct radeon_device *rdev,
1336 struct trinity_power_info *pi = trinity_get_pi(rdev);
1350 static void trinity_patch_thermal_state(struct radeon_device *rdev,
1354 struct trinity_power_info *pi = trinity_get_pi(rdev);
1374 trinity_get_sleep_divider_id_from_clock(rdev, ps->levels[0].sclk, sclk_in_sr);
1380 trinity_calculate_vce_wm(rdev, ps->levels[0].sclk);
1383 static u8 trinity_calculate_display_wm(struct radeon_device *rdev,
1403 static u32 trinity_get_uvd_clock_index(struct radeon_device *rdev,
1406 struct trinity_power_info *pi = trinity_get_pi(rdev);
1422 static void trinity_adjust_uvd_state(struct radeon_device *rdev,
1426 struct trinity_power_info *pi = trinity_get_pi(rdev);
1431 high_index = trinity_get_uvd_clock_index(rdev, rps);
1456 static int trinity_get_vce_clock_voltage(struct radeon_device *rdev,
1462 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;
1486 static void trinity_apply_state_adjust_rules(struct radeon_device *rdev,
1492 struct trinity_power_info *pi = trinity_get_pi(rdev);
1499 u32 num_active_displays = rdev->pm.dpm.new_active_crtc_count;
1502 return trinity_patch_thermal_state(rdev, ps, current_ps);
1504 trinity_adjust_uvd_state(rdev, new_rps);
1507 new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk;
1508 new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk;
1520 trinity_get_valid_engine_clock(rdev, min_sclk);
1525 if (ps->levels[i].sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk)
1526 ps->levels[i].sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk;
1528 trinity_get_vce_clock_voltage(rdev, new_rps->evclk, new_rps->ecclk, &min_vce_voltage);
1534 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[i].sclk, sclk_in_sr);
1541 trinity_calculate_display_wm(rdev, ps, i);
1543 trinity_calculate_vce_wm(rdev, ps->levels[0].sclk);
1571 static void trinity_cleanup_asic(struct radeon_device *rdev)
1573 sumo_take_smu_control(rdev, false);
1577 static void trinity_pre_display_configuration_change(struct radeon_device *rdev)
1579 struct trinity_power_info *pi = trinity_get_pi(rdev);
1582 trinity_dce_enable_voltage_adjustment(rdev, false);
1586 static void trinity_add_dccac_value(struct radeon_device *rdev)
1589 u32 num_active_displays = rdev->pm.dpm.new_active_crtc_count;
1590 u64 disp_clk = rdev->clock.default_dispclk / 100;
1602 void trinity_dpm_display_configuration_changed(struct radeon_device *rdev)
1604 struct trinity_power_info *pi = trinity_get_pi(rdev);
1607 trinity_dce_enable_voltage_adjustment(rdev, true);
1608 trinity_add_dccac_value(rdev);
1632 static void trinity_parse_pplib_non_clock_info(struct radeon_device *rdev,
1652 rdev->pm.dpm.boot_ps = rps;
1653 trinity_patch_boot_state(rdev, ps);
1656 rdev->pm.dpm.uvd_ps = rps;
1659 static void trinity_parse_pplib_clock_info(struct radeon_device *rdev,
1663 struct trinity_power_info *pi = trinity_get_pi(rdev);
1681 static int trinity_parse_power_table(struct radeon_device *rdev)
1683 struct radeon_mode_info *mode_info = &rdev->mode_info;
1713 rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries,
1716 if (!rdev->pm.dpm.ps)
1725 if (!rdev->pm.power_state[i].clock_info) {
1726 kfree(rdev->pm.dpm.ps);
1731 kfree(rdev->pm.dpm.ps);
1734 rdev->pm.dpm.ps[i].ps_priv = ps;
1746 trinity_parse_pplib_clock_info(rdev,
1747 &rdev->pm.dpm.ps[i], k,
1751 trinity_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i],
1756 rdev->pm.dpm.num_ps = state_array->ucNumEntries;
1761 clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx;
1766 rdev->pm.dpm.vce_states[i].sclk = sclk;
1767 rdev->pm.dpm.vce_states[i].mclk = 0;
1781 static u32 trinity_convert_did_to_freq(struct radeon_device *rdev, u8 did)
1783 struct trinity_power_info *pi = trinity_get_pi(rdev);
1800 static int trinity_parse_sys_info_table(struct radeon_device *rdev)
1802 struct trinity_power_info *pi = trinity_get_pi(rdev);
1803 struct radeon_mode_info *mode_info = &rdev->mode_info;
1862 sumo_construct_sclk_voltage_mapping_table(rdev,
1865 sumo_construct_vid_mapping_table(rdev, &pi->sys_info.vid_mapping_table,
1888 trinity_convert_did_to_freq(rdev,
1891 trinity_convert_did_to_freq(rdev,
1901 int trinity_dpm_init(struct radeon_device *rdev)
1909 rdev->pm.dpm.priv = pi;
1921 if (rdev->pdev->subsystem_vendor == 0x1462)
1941 ret = trinity_parse_sys_info_table(rdev);
1945 trinity_construct_boot_state(rdev);
1947 ret = r600_get_platform_caps(rdev);
1951 ret = r600_parse_extended_power_table(rdev);
1955 ret = trinity_parse_power_table(rdev);
1965 void trinity_dpm_print_power_state(struct radeon_device *rdev,
1978 trinity_convert_voltage_index_to_value(rdev, pl->vddc_index));
1980 r600_dpm_print_ps_status(rdev, rps);
1983 void trinity_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
1986 struct trinity_power_info *pi = trinity_get_pi(rdev);
2001 trinity_convert_voltage_index_to_value(rdev, pl->vddc_index));
2005 u32 trinity_dpm_get_current_sclk(struct radeon_device *rdev)
2007 struct trinity_power_info *pi = trinity_get_pi(rdev);
2023 u32 trinity_dpm_get_current_mclk(struct radeon_device *rdev)
2025 struct trinity_power_info *pi = trinity_get_pi(rdev);
2030 void trinity_dpm_fini(struct radeon_device *rdev)
2034 trinity_cleanup_asic(rdev); /* ??? */
2036 for (i = 0; i < rdev->pm.dpm.num_ps; i++) {
2037 kfree(rdev->pm.dpm.ps[i].ps_priv);
2039 kfree(rdev->pm.dpm.ps);
2040 kfree(rdev->pm.dpm.priv);
2041 r600_free_extended_power_table(rdev);
2044 u32 trinity_dpm_get_sclk(struct radeon_device *rdev, bool low)
2046 struct trinity_power_info *pi = trinity_get_pi(rdev);
2055 u32 trinity_dpm_get_mclk(struct radeon_device *rdev, bool low)
2057 struct trinity_power_info *pi = trinity_get_pi(rdev);