drm/radeon/rv770_dpm.c

229 		       struct rv7xx_pl *pl)
231 	return (pl->flags & ATOM_PPLIB_R600_FLAGS_LOWPOWER) ?
616 					    struct rv7xx_pl *pl,
624 		((pl->flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2) ? 1 : 0) : 0;
625 	level->gen2XSP  = (pl->flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2) ? 1 : 0;
626 	level->backbias = (pl->flags & ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE) ? 1 : 0;
630 		ret = rv740_populate_sclk_value(rdev, pl->sclk,
633 		ret = rv730_populate_sclk_value(rdev, pl->sclk,
636 		ret = rv770_populate_sclk_value(rdev, pl->sclk,
643 			if (pl->mclk <= pi->mclk_strobe_mode_threshold)
645 					rv740_get_mclk_frequency_ratio(pl->mclk) | 0x10;
649 			if (pl->mclk > pi->mclk_edc_enable_threshold)
654 		ret = rv740_populate_mclk_value(rdev, pl->sclk,
655 						pl->mclk, &level->mclk);
657 		ret = rv730_populate_mclk_value(rdev, pl->sclk,
658 						pl->mclk, &level->mclk);
660 		ret = rv770_populate_mclk_value(rdev, pl->sclk,
661 						pl->mclk, &level->mclk);
665 	ret = rv770_populate_vddc_value(rdev, pl->vddc,
670 	ret = rv770_populate_mvdd_value(rdev, pl->mclk, &level->mvdd);
2183 	struct rv7xx_pl *pl;
2187 		pl = &ps->low;
2190 		pl = &ps->medium;
2194 		pl = &ps->high;
2204 		pl->vddc = le16_to_cpu(clock_info->evergreen.usVDDC);
2205 		pl->vddci = le16_to_cpu(clock_info->evergreen.usVDDCI);
2206 		pl->flags = le32_to_cpu(clock_info->evergreen.ulFlags);
2213 		pl->vddc = le16_to_cpu(clock_info->r600.usVDDC);
2214 		pl->flags = le32_to_cpu(clock_info->r600.ulFlags);
2217 	pl->mclk = mclk;
2218 	pl->sclk = sclk;
2221 	if (pl->vddc == 0xff01) {
2223 			pl->vddc = pi->max_vddc;
2227 		pi->acpi_vddc = pl->vddc;
2229 			eg_pi->acpi_vddci = pl->vddci;
2239 			eg_pi->ulv.pl = pl;
2243 	if (pi->min_vddc_in_table > pl->vddc)
2244 		pi->min_vddc_in_table = pl->vddc;
2246 	if (pi->max_vddc_in_table < pl->vddc)
2247 		pi->max_vddc_in_table = pl->vddc;
2253 		pl->mclk = rdev->clock.default_mclk;
2254 		pl->sclk = rdev->clock.default_sclk;
2255 		pl->vddc = vddc;
2256 		pl->vddci = vddci;
2261 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk;
2262 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk;
2263 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc;
2264 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci;
2438 	struct rv7xx_pl *pl;
2444 		pl = &ps->low;
2446 		       pl->sclk, pl->mclk, pl->vddc, pl->vddci);
2447 		pl = &ps->medium;
2449 		       pl->sclk, pl->mclk, pl->vddc, pl->vddci);
2450 		pl = &ps->high;
2452 		       pl->sclk, pl->mclk, pl->vddc, pl->vddci);
2454 		pl = &ps->low;
2456 		       pl->sclk, pl->mclk, pl->vddc);
2457 		pl = &ps->medium;
2459 		       pl->sclk, pl->mclk, pl->vddc);
2460 		pl = &ps->high;
2462 		       pl->sclk, pl->mclk, pl->vddc);
2472 	struct rv7xx_pl *pl;
2481 			pl = &ps->low;
2483 			pl = &ps->medium;
2485 			pl = &ps->high;
2489 				   current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci);
2492 				   current_index, pl->sclk, pl->mclk, pl->vddc);
2501 	struct rv7xx_pl *pl;
2510 			pl = &ps->low;
2512 			pl = &ps->medium;
2514 			pl = &ps->high;
2515 		return  pl->sclk;
2523 	struct rv7xx_pl *pl;
2532 			pl = &ps->low;
2534 			pl = &ps->medium;
2536 			pl = &ps->high;
2537 		return  pl->mclk;