Lines Matching refs:dclk
571 (new_ps->dclk == old_ps->dclk))
577 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk);
588 (new_ps->dclk == old_ps->dclk))
594 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk);
728 rps->dclk = le32_to_cpu(non_clock_info->ulDCLK);
731 rps->dclk = 0;
735 if ((rps->vclk == 0) || (rps->dclk == 0)) {
737 rps->dclk = RS780_DEFAULT_DCLK_FREQ;
945 printk("\tuvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk);
994 seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk);