Lines Matching refs:dpm_level_enable_mask
2600 pi->dpm_level_enable_mask.pcie_dpm_enable_mask =
3261 pi->dpm_level_enable_mask.sclk_dpm_enable_mask =
3315 pi->dpm_level_enable_mask.mclk_dpm_enable_mask =
3779 if (pi->dpm_level_enable_mask.sclk_dpm_enable_mask) {
3782 pi->dpm_level_enable_mask.sclk_dpm_enable_mask);
3789 if (pi->dpm_level_enable_mask.mclk_dpm_enable_mask) {
3792 pi->dpm_level_enable_mask.mclk_dpm_enable_mask);
3799 if (pi->dpm_level_enable_mask.pcie_dpm_enable_mask) {
3802 pi->dpm_level_enable_mask.pcie_dpm_enable_mask);
3899 pi->dpm_level_enable_mask.uvd_dpm_enable_mask = 0;
3903 pi->dpm_level_enable_mask.uvd_dpm_enable_mask |= 1 << i;
3912 pi->dpm_level_enable_mask.uvd_dpm_enable_mask);
3916 pi->dpm_level_enable_mask.mclk_dpm_enable_mask &= 0xFFFFFFFE;
3919 pi->dpm_level_enable_mask.mclk_dpm_enable_mask);
3924 pi->dpm_level_enable_mask.mclk_dpm_enable_mask |= 1;
3927 pi->dpm_level_enable_mask.mclk_dpm_enable_mask);
3948 pi->dpm_level_enable_mask.vce_dpm_enable_mask = 0;
3951 pi->dpm_level_enable_mask.vce_dpm_enable_mask |= 1 << i;
3960 pi->dpm_level_enable_mask.vce_dpm_enable_mask);
3981 pi->dpm_level_enable_mask.samu_dpm_enable_mask = 0;
3984 pi->dpm_level_enable_mask.samu_dpm_enable_mask |= 1 << i;
3993 pi->dpm_level_enable_mask.samu_dpm_enable_mask);
4012 pi->dpm_level_enable_mask.acp_dpm_enable_mask = 0;
4015 pi->dpm_level_enable_mask.acp_dpm_enable_mask |= 1 << i;
4024 pi->dpm_level_enable_mask.acp_dpm_enable_mask);
4134 pi->dpm_level_enable_mask.sclk_dpm_enable_mask =
4136 pi->dpm_level_enable_mask.mclk_dpm_enable_mask =
4139 pi->dpm_level_enable_mask.mclk_dpm_enable_mask;
4141 if (pi->dpm_level_enable_mask.mclk_dpm_enable_mask & 1)
4142 pi->dpm_level_enable_mask.mclk_dpm_enable_mask &= 0xFFFFFFFE;
4144 pi->dpm_level_enable_mask.pcie_dpm_enable_mask =
4171 pi->dpm_level_enable_mask.pcie_dpm_enable_mask) {
4173 tmp = pi->dpm_level_enable_mask.pcie_dpm_enable_mask;
4190 pi->dpm_level_enable_mask.sclk_dpm_enable_mask) {
4192 tmp = pi->dpm_level_enable_mask.sclk_dpm_enable_mask;
4209 pi->dpm_level_enable_mask.mclk_dpm_enable_mask) {
4211 tmp = pi->dpm_level_enable_mask.mclk_dpm_enable_mask;
4229 pi->dpm_level_enable_mask.sclk_dpm_enable_mask) {
4231 pi->dpm_level_enable_mask.sclk_dpm_enable_mask);
4244 pi->dpm_level_enable_mask.mclk_dpm_enable_mask) {
4246 pi->dpm_level_enable_mask.mclk_dpm_enable_mask);
4259 pi->dpm_level_enable_mask.pcie_dpm_enable_mask) {
4261 pi->dpm_level_enable_mask.pcie_dpm_enable_mask);