subdev/pmu/gt215.c

30 gt215_pmu_send(struct nvkm_pmu *pmu, u32 reply[2],
33 	struct nvkm_subdev *subdev = &pmu->subdev;
37 	mutex_lock(&pmu->send.mutex);
45 		mutex_unlock(&pmu->send.mutex);
54 		pmu->recv.message = message;
55 		pmu->recv.process = process;
65 				pmu->send.base));
77 		wait_event(pmu->recv.wait, (pmu->recv.process == 0));
78 		reply[0] = pmu->recv.data[0];
79 		reply[1] = pmu->recv.data[1];
82 	mutex_unlock(&pmu->send.mutex);
87 gt215_pmu_recv(struct nvkm_pmu *pmu)
89 	struct nvkm_subdev *subdev = &pmu->subdev;
105 				pmu->recv.base));
116 	if (pmu->recv.process) {
117 		if (process == pmu->recv.process &&
118 		    message == pmu->recv.message) {
119 			pmu->recv.data[0] = data0;
120 			pmu->recv.data[1] = data1;
121 			pmu->recv.process = 0;
122 			wake_up(&pmu->recv.wait);
139 gt215_pmu_intr(struct nvkm_pmu *pmu)
141 	struct nvkm_subdev *subdev = &pmu->subdev;
158 		schedule_work(&pmu->recv.work);
178 gt215_pmu_fini(struct nvkm_pmu *pmu)
180 	nvkm_wr32(pmu->subdev.device, 0x10a014, 0x00000060);
181 	flush_work(&pmu->recv.work);
185 gt215_pmu_reset(struct nvkm_pmu *pmu)
187 	struct nvkm_device *device = pmu->subdev.device;
195 gt215_pmu_enabled(struct nvkm_pmu *pmu)
197 	return nvkm_rd32(pmu->subdev.device, 0x022210) & 0x00000001;
201 gt215_pmu_init(struct nvkm_pmu *pmu)
203 	struct nvkm_device *device = pmu->subdev.device;
207 	if (pmu->func->enabled(pmu)) {
215 	pmu->func->reset(pmu);
225 	for (i = 0; i < pmu->func->data.size / 4; i++)
226 		nvkm_wr32(device, 0x10a1c4, pmu->func->data.data[i]);
230 	for (i = 0; i < pmu->func->code.size / 4; i++) {
233 		nvkm_wr32(device, 0x10a184, pmu->func->code.data[i]);
241 	/* wait for valid host->pmu ring configuration */
247 	pmu->send.base = nvkm_rd32(device, 0x10a4d0) & 0x0000ffff;
248 	pmu->send.size = nvkm_rd32(device, 0x10a4d0) >> 16;
250 	/* wait for valid pmu->host ring configuration */
256 	pmu->recv.base = nvkm_rd32(device, 0x10a4dc) & 0x0000ffff;
257 	pmu->recv.size = nvkm_rd32(device, 0x10a4dc) >> 16;