subdev/acr/ga102.c

25 #include <nvfw/acr.h>
28 ga102_acr_wpr_patch(struct nvkm_acr *acr, s64 adjust)
40 		nvkm_robj(acr->wpr, offset, &hdr, sizeof(hdr));
41 		wpr_header_v2_dump(&acr->subdev, &hdr);
43 		list_for_each_entry(lsfw, &acr->lsfw, head) {
47 			nvkm_robj(acr->wpr, hdr.wpr.lsb_offset, lsb, sizeof(*lsb));
48 			lsb_header_v2_dump(&acr->subdev, lsb);
50 			lsfw->func->bld_patch(acr, lsb->bl_data_off, adjust);
62 ga102_acr_wpr_build_lsb(struct nvkm_acr *acr, struct nvkm_acr_lsfw *lsfw)
114 		ret = nvkm_falcon_get(fw.falcon, &acr->subdev);
123 			nvkm_falcon_put(fw.falcon, &acr->subdev);
127 	nvkm_wobj(acr->wpr, lsfw->offset.lsb, hdr, sizeof(*hdr));
133 ga102_acr_wpr_build(struct nvkm_acr *acr, struct nvkm_acr_lsf *rtos)
141 	nvkm_wo32(acr->wpr, 0x300, (2 << 16) | WPR_GENERIC_HEADER_ID_LSF_SHARED_SUB_WPR);
142 	nvkm_wo32(acr->wpr, 0x304, 0x14);
143 	nvkm_wo32(acr->wpr, 0x308, 0xffffffff);
144 	nvkm_wo32(acr->wpr, 0x30c, 0);
145 	nvkm_wo32(acr->wpr, 0x310, 0);
148 	list_for_each_entry(lsfw, &acr->lsfw, head) {
162 		nvkm_wobj(acr->wpr, offset, &hdr, sizeof(hdr));
166 		ret = ga102_acr_wpr_build_lsb(acr, lsfw);
171 		nvkm_wobj(acr->wpr, lsfw->offset.img,
176 		lsfw->func->bld_write(acr, lsfw->offset.bld, lsfw);
184 	nvkm_wobj(acr->wpr, offset, &hdr, sizeof(hdr));
189 ga102_acr_wpr_layout(struct nvkm_acr *acr)
199 	list_for_each_entry(lsfw, &acr->lsfw, head) {
218 ga102_acr_wpr_parse(struct nvkm_acr *acr)
220 	const struct wpr_header_v2 *hdr = (void *)acr->wpr_fw->data;
223 		wpr_header_v2_dump(&acr->subdev, hdr);
224 		if (!nvkm_acr_lsfw_add(NULL, acr, NULL, (hdr++)->wpr.falcon_id))
231 MODULE_FIRMWARE("nvidia/ga102/acr/ucode_unload.bin");
232 MODULE_FIRMWARE("nvidia/ga103/acr/ucode_unload.bin");
233 MODULE_FIRMWARE("nvidia/ga104/acr/ucode_unload.bin");
234 MODULE_FIRMWARE("nvidia/ga106/acr/ucode_unload.bin");
235 MODULE_FIRMWARE("nvidia/ga107/acr/ucode_unload.bin");
243 MODULE_FIRMWARE("nvidia/ga102/acr/ucode_asb.bin");
244 MODULE_FIRMWARE("nvidia/ga103/acr/ucode_asb.bin");
245 MODULE_FIRMWARE("nvidia/ga104/acr/ucode_asb.bin");
246 MODULE_FIRMWARE("nvidia/ga106/acr/ucode_asb.bin");
247 MODULE_FIRMWARE("nvidia/ga107/acr/ucode_asb.bin");
264 MODULE_FIRMWARE("nvidia/ga102/acr/ucode_ahesasc.bin");
265 MODULE_FIRMWARE("nvidia/ga103/acr/ucode_ahesasc.bin");
266 MODULE_FIRMWARE("nvidia/ga104/acr/ucode_ahesasc.bin");
267 MODULE_FIRMWARE("nvidia/ga106/acr/ucode_ahesasc.bin");
268 MODULE_FIRMWARE("nvidia/ga107/acr/ucode_ahesasc.bin");
291 ga102_acr_load(struct nvkm_acr *acr, int version,
294 	struct nvkm_subdev *subdev = &acr->subdev;
298 				    acr, NULL, "acr/ucode_ahesasc", "AHESASC");
303 				    acr, NULL, "acr/ucode_asb", "ASB");
308 				    acr, NULL, "acr/ucode_unload", "unload");