engine/gr/tu102.c

30 tu102_gr_init_fecs_exceptions(struct gf100_gr *gr)
32 	nvkm_wr32(gr->base.engine.subdev.device, 0x409c24, 0x006e0003);
36 tu102_gr_init_fs(struct gf100_gr *gr)
38 	struct nvkm_device *device = gr->base.engine.subdev.device;
41 	gp100_grctx_generate_smid_config(gr);
42 	gk104_grctx_generate_gpc_tpc_nr(gr);
44 	for (sm = 0; sm < gr->sm_nr; sm++) {
45 		int tpc = gv100_gr_nonpes_aware_tpc(gr, gr->sm[sm].gpc, gr->sm[sm].tpc);
47 		nvkm_wr32(device, GPC_UNIT(gr->sm[sm].gpc, 0x0c10 + tpc * 4), sm);
50 	gm200_grctx_generate_dist_skip_table(gr);
51 	gf100_gr_init_num_tpc_per_gpc(gr, true, true);
55 tu102_gr_init_zcull(struct gf100_gr *gr)
57 	struct nvkm_device *device = gr->base.engine.subdev.device;
58 	const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);
59 	const u8 tile_nr = gr->func->gpc_nr * gr->func->tpc_nr;
64 		for (data = 0, j = 0; j < 8 && i + j < gr->tpc_total; j++) {
65 			data |= bank[gr->tile[i + j]] << (j * 4);
66 			bank[gr->tile[i + j]]++;
71 	for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
73 			  gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]);
75 							 gr->tpc_total);
83 tu102_gr_init_gpc_mmu(struct gf100_gr *gr)
85 	struct nvkm_device *device = gr->base.engine.subdev.device;
135 MODULE_FIRMWARE("nvidia/tu102/gr/fecs_bl.bin");
136 MODULE_FIRMWARE("nvidia/tu102/gr/fecs_inst.bin");
137 MODULE_FIRMWARE("nvidia/tu102/gr/fecs_data.bin");
138 MODULE_FIRMWARE("nvidia/tu102/gr/fecs_sig.bin");
139 MODULE_FIRMWARE("nvidia/tu102/gr/gpccs_bl.bin");
140 MODULE_FIRMWARE("nvidia/tu102/gr/gpccs_inst.bin");
141 MODULE_FIRMWARE("nvidia/tu102/gr/gpccs_data.bin");
142 MODULE_FIRMWARE("nvidia/tu102/gr/gpccs_sig.bin");
143 MODULE_FIRMWARE("nvidia/tu102/gr/sw_ctx.bin");
144 MODULE_FIRMWARE("nvidia/tu102/gr/sw_nonctx.bin");
145 MODULE_FIRMWARE("nvidia/tu102/gr/sw_bundle_init.bin");
146 MODULE_FIRMWARE("nvidia/tu102/gr/sw_method_init.bin");
147 MODULE_FIRMWARE("nvidia/tu102/gr/sw_veid_bundle_init.bin");
149 MODULE_FIRMWARE("nvidia/tu104/gr/fecs_bl.bin");
150 MODULE_FIRMWARE("nvidia/tu104/gr/fecs_inst.bin");
151 MODULE_FIRMWARE("nvidia/tu104/gr/fecs_data.bin");
152 MODULE_FIRMWARE("nvidia/tu104/gr/fecs_sig.bin");
153 MODULE_FIRMWARE("nvidia/tu104/gr/gpccs_bl.bin");
154 MODULE_FIRMWARE("nvidia/tu104/gr/gpccs_inst.bin");
155 MODULE_FIRMWARE("nvidia/tu104/gr/gpccs_data.bin");
156 MODULE_FIRMWARE("nvidia/tu104/gr/gpccs_sig.bin");
157 MODULE_FIRMWARE("nvidia/tu104/gr/sw_ctx.bin");
158 MODULE_FIRMWARE("nvidia/tu104/gr/sw_nonctx.bin");
159 MODULE_FIRMWARE("nvidia/tu104/gr/sw_bundle_init.bin");
160 MODULE_FIRMWARE("nvidia/tu104/gr/sw_method_init.bin");
161 MODULE_FIRMWARE("nvidia/tu104/gr/sw_veid_bundle_init.bin");
163 MODULE_FIRMWARE("nvidia/tu106/gr/fecs_bl.bin");
164 MODULE_FIRMWARE("nvidia/tu106/gr/fecs_inst.bin");
165 MODULE_FIRMWARE("nvidia/tu106/gr/fecs_data.bin");
166 MODULE_FIRMWARE("nvidia/tu106/gr/fecs_sig.bin");
167 MODULE_FIRMWARE("nvidia/tu106/gr/gpccs_bl.bin");
168 MODULE_FIRMWARE("nvidia/tu106/gr/gpccs_inst.bin");
169 MODULE_FIRMWARE("nvidia/tu106/gr/gpccs_data.bin");
170 MODULE_FIRMWARE("nvidia/tu106/gr/gpccs_sig.bin");
171 MODULE_FIRMWARE("nvidia/tu106/gr/sw_ctx.bin");
172 MODULE_FIRMWARE("nvidia/tu106/gr/sw_nonctx.bin");
173 MODULE_FIRMWARE("nvidia/tu106/gr/sw_bundle_init.bin");
174 MODULE_FIRMWARE("nvidia/tu106/gr/sw_method_init.bin");
175 MODULE_FIRMWARE("nvidia/tu106/gr/sw_veid_bundle_init.bin");
177 MODULE_FIRMWARE("nvidia/tu117/gr/fecs_bl.bin");
178 MODULE_FIRMWARE("nvidia/tu117/gr/fecs_inst.bin");
179 MODULE_FIRMWARE("nvidia/tu117/gr/fecs_data.bin");
180 MODULE_FIRMWARE("nvidia/tu117/gr/fecs_sig.bin");
181 MODULE_FIRMWARE("nvidia/tu117/gr/gpccs_bl.bin");
182 MODULE_FIRMWARE("nvidia/tu117/gr/gpccs_inst.bin");
183 MODULE_FIRMWARE("nvidia/tu117/gr/gpccs_data.bin");
184 MODULE_FIRMWARE("nvidia/tu117/gr/gpccs_sig.bin");
185 MODULE_FIRMWARE("nvidia/tu117/gr/sw_ctx.bin");
186 MODULE_FIRMWARE("nvidia/tu117/gr/sw_nonctx.bin");
187 MODULE_FIRMWARE("nvidia/tu117/gr/sw_bundle_init.bin");
188 MODULE_FIRMWARE("nvidia/tu117/gr/sw_method_init.bin");
189 MODULE_FIRMWARE("nvidia/tu117/gr/sw_veid_bundle_init.bin");
191 MODULE_FIRMWARE("nvidia/tu116/gr/fecs_bl.bin");
192 MODULE_FIRMWARE("nvidia/tu116/gr/fecs_inst.bin");
193 MODULE_FIRMWARE("nvidia/tu116/gr/fecs_data.bin");
194 MODULE_FIRMWARE("nvidia/tu116/gr/fecs_sig.bin");
195 MODULE_FIRMWARE("nvidia/tu116/gr/gpccs_bl.bin");
196 MODULE_FIRMWARE("nvidia/tu116/gr/gpccs_inst.bin");
197 MODULE_FIRMWARE("nvidia/tu116/gr/gpccs_data.bin");
198 MODULE_FIRMWARE("nvidia/tu116/gr/gpccs_sig.bin");
199 MODULE_FIRMWARE("nvidia/tu116/gr/sw_ctx.bin");
200 MODULE_FIRMWARE("nvidia/tu116/gr/sw_nonctx.bin");
201 MODULE_FIRMWARE("nvidia/tu116/gr/sw_bundle_init.bin");
202 MODULE_FIRMWARE("nvidia/tu116/gr/sw_method_init.bin");
203 MODULE_FIRMWARE("nvidia/tu116/gr/sw_veid_bundle_init.bin");