Lines Matching defs:gr
34 nv40_gr_units(struct nvkm_gr *gr)
36 return nvkm_rd32(gr->engine.subdev.device, 0x1540);
78 struct nv40_gr *gr = chan->gr;
79 int ret = nvkm_gpuobj_new(gr->base.engine.subdev.device, gr->size,
84 nv40_grctx_fill(gr->base.engine.subdev.device, *pgpuobj);
95 struct nv40_gr *gr = chan->gr;
96 struct nvkm_subdev *subdev = &gr->base.engine.subdev;
134 spin_lock_irqsave(&chan->gr->base.engine.lock, flags);
136 spin_unlock_irqrestore(&chan->gr->base.engine.lock, flags);
151 struct nv40_gr *gr = nv40_gr(base);
158 chan->gr = gr;
162 spin_lock_irqsave(&chan->gr->base.engine.lock, flags);
163 list_add(&chan->head, &gr->chan);
164 spin_unlock_irqrestore(&chan->gr->base.engine.lock, flags);
175 struct nv40_gr *gr = nv40_gr(base);
176 struct nvkm_device *device = gr->base.engine.subdev.device;
181 nv04_gr_idle(&gr->base);
234 struct nv40_gr *gr = nv40_gr(base);
236 struct nvkm_subdev *subdev = &gr->base.engine.subdev;
251 spin_lock_irqsave(&gr->base.engine.lock, flags);
252 list_for_each_entry(temp, &gr->chan, head) {
256 list_add(&chan->head, &gr->chan);
283 spin_unlock_irqrestore(&gr->base.engine.lock, flags);
289 struct nv40_gr *gr = nv40_gr(base);
290 struct nvkm_device *device = gr->base.engine.subdev.device;
295 ret = nv40_grctx_init(device, &gr->size);
434 struct nv40_gr *gr;
436 if (!(gr = kzalloc(sizeof(*gr), GFP_KERNEL)))
438 *pgr = &gr->base;
439 INIT_LIST_HEAD(&gr->chan);
441 return nvkm_gr_ctor(func, device, type, inst, true, &gr->base);