engine/disp/gv100.c

345 		u32 stat = nvkm_rd32(device, 0x610664 + soff);
346 		if ((stat & 0x000f0000) == 0x00040000)
560 		u32 stat = nvkm_rd32(device, 0x610664 + soff);
561 		if ((stat & 0x00070000) == 0x00040000)
726 		u32 stat = nvkm_rd32(device, 0x610630);
727 		if ((stat & 0x001f0000) == 0x000b0000)
841 	u32 stat, mask[4];
844 	stat = nvkm_rd32(device, 0x6107a8);
846 	nvkm_debug(subdev, "supervisor %d: %08x\n", ffs(disp->super.pending), stat);
898 	u32 stat = nvkm_rd32(device, 0x611020 + (chid * 12));
899 	u32 type = (stat & 0x00007000) >> 12;
900 	u32 mthd = (stat & 0x00000fff) << 2;
912 		nvkm_error(subdev, "chid %d stat %08x reason %d [%s] "
914 			   chid, stat, type, reason ? reason->name : "",
917 		nvkm_error(subdev, "chid %d stat %08x reason %d [%s] "
919 			   chid, stat, type, reason ? reason->name : "", mthd);
940 	u32 stat = nvkm_rd32(device, 0x611c30);
942 	if (stat & 0x00000007) {
943 		disp->super.pending = (stat & 0x00000007);
946 		stat &= ~0x00000007;
952 	if (stat & 0x00000008)
953 		stat &= ~0x00000008;
955 	if (stat & 0x00000080) {
958 		stat &= ~0x00000080;
961 	if (stat & 0x00000100) {
979 	if (stat)
980 		nvkm_warn(subdev, "ctrl %08x\n", stat);
988 	u32 stat = nvkm_rd32(device, 0x611854);
992 	if (stat & 0x00000001) {
995 		stat &= ~0x00000001;
998 	if ((mask = (stat & 0x00ff0000) >> 16)) {
1002 			stat &= ~(0x00010000 << head);
1006 	if (stat) {
1007 		nvkm_warn(subdev, "exception %08x\n", stat);
1008 		nvkm_wr32(device, 0x611854, stat);
1017 	unsigned long stat = nvkm_rd32(device, 0x611850);
1020 	for_each_set_bit(wndw, &stat, disp->wndw.nr) {
1023 		stat &= ~BIT(wndw);
1026 	if (stat) {
1027 		nvkm_warn(subdev, "wimm %08x\n", (u32)stat);
1028 		nvkm_wr32(device, 0x611850, stat);
1037 	unsigned long stat = nvkm_rd32(device, 0x61184c);
1040 	for_each_set_bit(wndw, &stat, disp->wndw.nr) {
1043 		stat &= ~BIT(wndw);
1046 	if (stat) {
1047 		nvkm_warn(subdev, "wndw %08x\n", (u32)stat);
1048 		nvkm_wr32(device, 0x61184c, stat);
1057 	u32 stat = nvkm_rd32(device, 0x611800 + (head * 0x04));
1060 	if (stat & 0x00000003) {
1061 		nvkm_wr32(device, 0x611800 + (head * 0x04), stat & 0x00000003);
1062 		stat &= ~0x00000003;
1065 	if (stat & 0x00000004) {
1068 		stat &= ~0x00000004;
1071 	if (stat) {
1072 		nvkm_warn(subdev, "head %08x\n", stat);
1073 		nvkm_wr32(device, 0x611800 + (head * 0x04), stat);
1082 	u32 stat = nvkm_rd32(device, 0x611ec0);
1086 	if ((mask = (stat & 0x000000ff))) {
1089 			stat &= ~BIT(head);
1093 	if (stat & 0x00000200) {
1095 		stat &= ~0x00000200;
1098 	if (stat & 0x00000400) {
1100 		stat &= ~0x00000400;
1103 	if (stat & 0x00000800) {
1105 		stat &= ~0x00000800;
1108 	if (stat & 0x00001000) {
1110 		stat &= ~0x00001000;
1113 	if (stat)
1114 		nvkm_warn(subdev, "intr %08x\n", stat);