Lines Matching refs:cfg
604 const struct msm_dsi_phy_cfg *cfg = phy->cfg;
612 for (i = 0; i < cfg->num_dsi_phy; i++) {
613 if (cfg->io_start[i] == res->start)
639 phy->cfg = of_device_get_match_data(&pdev->dev);
640 if (!phy->cfg)
665 if (phy->cfg->has_phy_lane) {
672 if (phy->cfg->has_phy_regulator) {
679 if (phy->cfg->ops.parse_dt_properties) {
680 ret = phy->cfg->ops.parse_dt_properties(phy);
685 ret = devm_regulator_bulk_get_const(dev, phy->cfg->num_regulators,
686 phy->cfg->regulator_data,
707 if (phy->cfg->ops.pll_init) {
708 ret = phy->cfg->ops.pll_init(phy);
752 if (!phy || !phy->cfg->ops.enable)
764 ret = regulator_bulk_enable(phy->cfg->num_regulators, phy->supplies);
771 ret = phy->cfg->ops.enable(phy, clk_req);
798 if (phy->cfg->ops.disable)
799 phy->cfg->ops.disable(phy);
801 regulator_bulk_disable(phy->cfg->num_regulators, phy->supplies);
810 if (!phy || !phy->cfg->ops.disable)
813 phy->cfg->ops.disable(phy);
815 regulator_bulk_disable(phy->cfg->num_regulators, phy->supplies);
829 if (!phy || !phy->cfg->ops.set_continuous_clock)
832 return phy->cfg->ops.set_continuous_clock(phy, enable);
837 if (phy->cfg->ops.save_pll_state) {
838 phy->cfg->ops.save_pll_state(phy);
847 if (phy->cfg->ops.restore_pll_state && phy->state_saved) {
848 ret = phy->cfg->ops.restore_pll_state(phy);