Lines Matching defs:drm_dev

74 	struct drm_device *drm_dev;
134 drm_dbg_dp(ctrl->drm_dev, "mainlink off\n");
710 drm_dbg_dp(ctrl->drm_dev,
746 drm_dbg_dp(ctrl->drm_dev,
941 drm_dbg_dp(ctrl->drm_dev, "TU: valid_boundary_link: %d\n",
943 drm_dbg_dp(ctrl->drm_dev, "TU: delay_start_link: %d\n",
945 drm_dbg_dp(ctrl->drm_dev, "TU: boundary_moderation_en: %d\n",
947 drm_dbg_dp(ctrl->drm_dev, "TU: valid_lower_boundary_link: %d\n",
949 drm_dbg_dp(ctrl->drm_dev, "TU: upper_boundary_count: %d\n",
951 drm_dbg_dp(ctrl->drm_dev, "TU: lower_boundary_count: %d\n",
953 drm_dbg_dp(ctrl->drm_dev, "TU: tu_size_minus1: %d\n",
1046 drm_dbg_dp(ctrl->drm_dev,
1056 drm_dbg_dp(ctrl->drm_dev,
1063 drm_dbg_dp(ctrl->drm_dev,
1076 drm_dbg_dp(ctrl->drm_dev, "sink: p|v=0x%x\n",
1092 drm_dbg_dp(ctrl->drm_dev, "sink: pattern=%x\n", pattern);
1194 drm_dbg_dp(ctrl->drm_dev, "new rate=0x%x\n",
1310 drm_dbg_dp(ctrl->drm_dev, "link training #1 successful\n");
1319 drm_dbg_dp(ctrl->drm_dev, "link training #2 successful\n");
1356 drm_dbg_dp(ctrl->drm_dev, "core clks already enabled\n");
1366 drm_dbg_dp(ctrl->drm_dev, "enable core clocks \n");
1367 drm_dbg_dp(ctrl->drm_dev, "stream_clks:%s link_clks:%s core_clks:%s\n",
1385 drm_dbg_dp(ctrl->drm_dev, "disable core clocks \n");
1386 drm_dbg_dp(ctrl->drm_dev, "stream_clks:%s link_clks:%s core_clks:%s\n",
1400 drm_dbg_dp(ctrl->drm_dev, "links clks already enabled\n");
1405 drm_dbg_dp(ctrl->drm_dev, "Enable core clks before link clks\n");
1416 drm_dbg_dp(ctrl->drm_dev, "enable link clocks\n");
1417 drm_dbg_dp(ctrl->drm_dev, "stream_clks:%s link_clks:%s core_clks:%s\n",
1435 drm_dbg_dp(ctrl->drm_dev, "disabled link clocks\n");
1436 drm_dbg_dp(ctrl->drm_dev, "stream_clks:%s link_clks:%s core_clks:%s\n",
1460 drm_dbg_dp(ctrl->drm_dev, "link rate=%d\n", ctrl->link->link_params.rate);
1551 drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n",
1565 drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n",
1618 drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n",
1652 drm_dbg_dp(ctrl->drm_dev, "request: 0x%x\n", pattern_requested);
1693 drm_dbg_dp(ctrl->drm_dev, "%s: test->0x%x\n",
1704 drm_dbg_dp(ctrl->drm_dev,
1730 drm_dbg_dp(ctrl->drm_dev, "pixel clks already enabled\n");
1759 drm_dbg_dp(ctrl->drm_dev, "PHY_TEST_PATTERN request\n");
1833 drm_dbg_dp(ctrl->drm_dev,
1845 drm_dbg_dp(ctrl->drm_dev, "rate=%d, num_lanes=%d, pixel_rate=%lu\n",
1961 drm_dbg_dp(ctrl->drm_dev, "rate=%d, num_lanes=%d, pixel_rate=%lu\n",
1965 drm_dbg_dp(ctrl->drm_dev,
1984 drm_dbg_dp(ctrl->drm_dev, "pixel clks already enabled\n");
2022 drm_dbg_dp(ctrl->drm_dev,
2058 drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n",
2106 drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n",
2128 drm_dbg_dp(ctrl->drm_dev, "PSR exit done\n");
2131 drm_dbg_dp(ctrl->drm_dev, "PSR frame update done\n");
2134 drm_dbg_dp(ctrl->drm_dev, "PSR frame capture done\n");
2141 drm_dbg_dp(ctrl->drm_dev, "dp_video_ready\n");
2147 drm_dbg_dp(ctrl->drm_dev, "idle_patterns_sent\n");