Lines Matching refs:catalog

88 	struct dp_catalog_private *catalog = container_of(dp_catalog,
90 struct dss_io_data *dss = &catalog->io;
98 static inline u32 dp_read_aux(struct dp_catalog_private *catalog, u32 offset)
100 return readl_relaxed(catalog->io.aux.base + offset);
103 static inline void dp_write_aux(struct dp_catalog_private *catalog,
110 writel(data, catalog->io.aux.base + offset);
113 static inline u32 dp_read_ahb(const struct dp_catalog_private *catalog, u32 offset)
115 return readl_relaxed(catalog->io.ahb.base + offset);
118 static inline void dp_write_ahb(struct dp_catalog_private *catalog,
125 writel(data, catalog->io.ahb.base + offset);
128 static inline void dp_write_p0(struct dp_catalog_private *catalog,
135 writel(data, catalog->io.p0.base + offset);
138 static inline u32 dp_read_p0(struct dp_catalog_private *catalog,
145 return readl_relaxed(catalog->io.p0.base + offset);
148 static inline u32 dp_read_link(struct dp_catalog_private *catalog, u32 offset)
150 return readl_relaxed(catalog->io.link.base + offset);
153 static inline void dp_write_link(struct dp_catalog_private *catalog,
160 writel(data, catalog->io.link.base + offset);
163 /* aux related catalog functions */
166 struct dp_catalog_private *catalog = container_of(dp_catalog,
169 return dp_read_aux(catalog, REG_DP_AUX_DATA);
174 struct dp_catalog_private *catalog = container_of(dp_catalog,
177 dp_write_aux(catalog, REG_DP_AUX_DATA, data);
183 struct dp_catalog_private *catalog = container_of(dp_catalog,
186 dp_write_aux(catalog, REG_DP_AUX_TRANS_CTRL, data);
193 struct dp_catalog_private *catalog = container_of(dp_catalog,
197 data = dp_read_aux(catalog, REG_DP_AUX_TRANS_CTRL);
199 dp_write_aux(catalog, REG_DP_AUX_TRANS_CTRL, data);
201 dp_write_aux(catalog, REG_DP_AUX_TRANS_CTRL, 0);
208 struct dp_catalog_private *catalog = container_of(dp_catalog,
211 dp_read_aux(catalog, REG_DP_PHY_AUX_INTERRUPT_STATUS);
212 dp_write_aux(catalog, REG_DP_PHY_AUX_INTERRUPT_CLEAR, 0x1f);
213 dp_write_aux(catalog, REG_DP_PHY_AUX_INTERRUPT_CLEAR, 0x9f);
214 dp_write_aux(catalog, REG_DP_PHY_AUX_INTERRUPT_CLEAR, 0);
221 * @dp_catalog: DP catalog structure
233 struct dp_catalog_private *catalog = container_of(dp_catalog,
236 aux_ctrl = dp_read_aux(catalog, REG_DP_AUX_CTRL);
239 dp_write_aux(catalog, REG_DP_AUX_CTRL, aux_ctrl);
243 dp_write_aux(catalog, REG_DP_AUX_CTRL, aux_ctrl);
249 struct dp_catalog_private *catalog = container_of(dp_catalog,
252 aux_ctrl = dp_read_aux(catalog, REG_DP_AUX_CTRL);
255 dp_write_aux(catalog, REG_DP_TIMEOUT_COUNT, 0xffff);
256 dp_write_aux(catalog, REG_DP_AUX_LIMITS, 0xffff);
262 dp_write_aux(catalog, REG_DP_AUX_CTRL, aux_ctrl);
269 struct dp_catalog_private *catalog = container_of(dp_catalog,
273 return readl_poll_timeout(catalog->io.aux.base +
299 struct dp_catalog_private *catalog = container_of(dp_catalog,
301 struct dss_io_data *io = &catalog->io;
318 struct dp_catalog_private *catalog = container_of(dp_catalog,
322 intr = dp_read_ahb(catalog, REG_DP_INTR_STATUS);
326 dp_write_ahb(catalog, REG_DP_INTR_STATUS, intr_ack |
333 /* controller related catalog functions */
338 struct dp_catalog_private *catalog = container_of(dp_catalog,
341 dp_write_link(catalog, REG_DP_VALID_BOUNDARY, valid_boundary);
342 dp_write_link(catalog, REG_DP_TU, dp_tu);
343 dp_write_link(catalog, REG_DP_VALID_BOUNDARY_2, valid_boundary2);
348 struct dp_catalog_private *catalog = container_of(dp_catalog,
351 dp_write_link(catalog, REG_DP_STATE_CTRL, state);
356 struct dp_catalog_private *catalog = container_of(dp_catalog,
359 drm_dbg_dp(catalog->drm_dev, "DP_CONFIGURATION_CTRL=0x%x\n", cfg);
361 dp_write_link(catalog, REG_DP_CONFIGURATION_CTRL, cfg);
366 struct dp_catalog_private *catalog = container_of(dp_catalog,
376 dp_write_link(catalog, REG_DP_LOGICAL2PHYSICAL_LANE_MAPPING,
384 struct dp_catalog_private *catalog = container_of(dp_catalog,
387 val = dp_read_link(catalog, REG_DP_MAINLINK_CTRL);
394 dp_write_link(catalog, REG_DP_MAINLINK_CTRL, val);
401 struct dp_catalog_private *catalog = container_of(dp_catalog,
404 drm_dbg_dp(catalog->drm_dev, "enable=%d\n", enable);
410 mainlink_ctrl = dp_read_link(catalog, REG_DP_MAINLINK_CTRL);
414 dp_write_link(catalog, REG_DP_MAINLINK_CTRL, mainlink_ctrl);
417 dp_write_link(catalog, REG_DP_MAINLINK_CTRL, mainlink_ctrl);
420 dp_write_link(catalog, REG_DP_MAINLINK_CTRL, mainlink_ctrl);
424 dp_write_link(catalog, REG_DP_MAINLINK_CTRL, mainlink_ctrl);
426 mainlink_ctrl = dp_read_link(catalog, REG_DP_MAINLINK_CTRL);
428 dp_write_link(catalog, REG_DP_MAINLINK_CTRL, mainlink_ctrl);
437 struct dp_catalog_private *catalog = container_of(dp_catalog,
440 misc_val = dp_read_link(catalog, REG_DP_MISC1_MISC0);
449 drm_dbg_dp(catalog->drm_dev, "misc settings = 0x%x\n", misc_val);
450 dp_write_link(catalog, REG_DP_MISC1_MISC0, misc_val);
456 struct dp_catalog_private *catalog = container_of(dp_catalog,
459 mainlink_ctrl = dp_read_link(catalog, REG_DP_MAINLINK_CTRL);
467 dp_write_link(catalog, REG_DP_MAINLINK_CTRL, mainlink_ctrl);
481 struct dp_catalog_private *catalog = container_of(dp_catalog,
524 drm_dbg_dp(catalog->drm_dev, "mvid=0x%x, nvid=0x%x\n", mvid, nvid);
525 dp_write_link(catalog, REG_DP_SOFTWARE_MVID, mvid);
526 dp_write_link(catalog, REG_DP_SOFTWARE_NVID, nvid);
527 dp_write_p0(catalog, MMSS_DP_DSC_DTO, 0x0);
535 struct dp_catalog_private *catalog = container_of(dp_catalog,
539 drm_dbg_dp(catalog->drm_dev, "hw: bit=%d train=%d\n", bit, state_bit);
545 ret = readx_poll_timeout(readl, catalog->io.link.base +
559 * @dp_catalog: DP catalog structure
566 const struct dp_catalog_private *catalog = container_of(dp_catalog,
569 return dp_read_ahb(catalog, REG_DP_HW_VERSION);
575 * @dp_catalog: DP catalog structure
587 struct dp_catalog_private *catalog = container_of(dp_catalog,
590 sw_reset = dp_read_ahb(catalog, REG_DP_SW_RESET);
593 dp_write_ahb(catalog, REG_DP_SW_RESET, sw_reset);
597 dp_write_ahb(catalog, REG_DP_SW_RESET, sw_reset);
604 struct dp_catalog_private *catalog = container_of(dp_catalog,
608 ret = readl_poll_timeout(catalog->io.link.base +
623 struct dp_catalog_private *catalog = container_of(dp_catalog,
627 dp_write_ahb(catalog, REG_DP_INTR_STATUS,
629 dp_write_ahb(catalog, REG_DP_INTR_STATUS2,
632 dp_write_ahb(catalog, REG_DP_INTR_STATUS, 0x00);
633 dp_write_ahb(catalog, REG_DP_INTR_STATUS2, 0x00);
640 struct dp_catalog_private *catalog = container_of(dp_catalog,
643 u32 config = dp_read_aux(catalog, REG_DP_DP_HPD_INT_MASK);
647 drm_dbg_dp(catalog->drm_dev, "intr_mask=%#x config=%#x\n",
649 dp_write_aux(catalog, REG_DP_DP_HPD_INT_MASK,
655 struct dp_catalog_private *catalog = container_of(dp_catalog,
658 u32 reftimer = dp_read_aux(catalog, REG_DP_DP_HPD_REFTIMER);
662 dp_write_aux(catalog, REG_DP_DP_HPD_REFTIMER, reftimer);
665 dp_write_aux(catalog, REG_DP_DP_HPD_CTRL, DP_DP_HPD_CTRL_HPD_EN);
670 struct dp_catalog_private *catalog = container_of(dp_catalog,
673 u32 reftimer = dp_read_aux(catalog, REG_DP_DP_HPD_REFTIMER);
676 dp_write_aux(catalog, REG_DP_DP_HPD_REFTIMER, reftimer);
678 dp_write_aux(catalog, REG_DP_DP_HPD_CTRL, 0);
681 static void dp_catalog_enable_sdp(struct dp_catalog_private *catalog)
684 dp_write_link(catalog, MMSS_DP_SDP_CFG3, UPDATE_SDP);
685 dp_write_link(catalog, MMSS_DP_SDP_CFG3, 0x0);
690 struct dp_catalog_private *catalog = container_of(dp_catalog,
695 config = dp_read_link(catalog, REG_PSR_CONFIG);
697 dp_write_link(catalog, REG_PSR_CONFIG, config);
699 dp_write_ahb(catalog, REG_DP_INTR_MASK4, DP_INTERRUPT_MASK4);
700 dp_catalog_enable_sdp(catalog);
705 struct dp_catalog_private *catalog = container_of(dp_catalog,
709 cmd = dp_read_link(catalog, REG_PSR_CMD);
718 dp_catalog_enable_sdp(catalog);
719 dp_write_link(catalog, REG_PSR_CMD, cmd);
724 struct dp_catalog_private *catalog = container_of(dp_catalog,
728 status = dp_read_aux(catalog, REG_DP_DP_HPD_INT_STATUS);
729 drm_dbg_dp(catalog->drm_dev, "aux status: %#x\n", status);
738 struct dp_catalog_private *catalog = container_of(dp_catalog,
742 isr = dp_read_aux(catalog, REG_DP_DP_HPD_INT_STATUS);
743 dp_write_aux(catalog, REG_DP_DP_HPD_INT_ACK,
745 mask = dp_read_aux(catalog, REG_DP_DP_HPD_INT_MASK);
759 struct dp_catalog_private *catalog = container_of(dp_catalog,
763 intr = dp_read_ahb(catalog, REG_DP_INTR_STATUS4);
766 dp_write_ahb(catalog, REG_DP_INTR_STATUS4, intr_ack);
773 struct dp_catalog_private *catalog = container_of(dp_catalog,
777 intr = dp_read_ahb(catalog, REG_DP_INTR_STATUS2);
781 dp_write_ahb(catalog, REG_DP_INTR_STATUS2,
789 struct dp_catalog_private *catalog = container_of(dp_catalog,
792 dp_write_ahb(catalog, REG_DP_PHY_CTRL,
795 dp_write_ahb(catalog, REG_DP_PHY_CTRL, 0x0);
801 struct dp_catalog_private *catalog = container_of(dp_catalog,
806 dp_write_link(catalog, REG_DP_STATE_CTRL, 0x0);
808 drm_dbg_dp(catalog->drm_dev, "pattern: %#x\n", pattern);
811 dp_write_link(catalog, REG_DP_STATE_CTRL,
816 dp_write_link(catalog, REG_DP_HBR2_COMPLIANCE_SCRAMBLER_RESET,
819 dp_write_link(catalog, REG_DP_HBR2_COMPLIANCE_SCRAMBLER_RESET,
821 dp_write_link(catalog, REG_DP_MAINLINK_LEVELS,
823 dp_write_link(catalog, REG_DP_STATE_CTRL,
827 dp_write_link(catalog, REG_DP_STATE_CTRL,
831 dp_write_link(catalog, REG_DP_STATE_CTRL,
834 dp_write_link(catalog, REG_DP_TEST_80BIT_CUSTOM_PATTERN_REG0,
837 dp_write_link(catalog, REG_DP_TEST_80BIT_CUSTOM_PATTERN_REG1,
840 dp_write_link(catalog, REG_DP_TEST_80BIT_CUSTOM_PATTERN_REG2,
844 value = dp_read_link(catalog, REG_DP_MAINLINK_CTRL);
846 dp_write_link(catalog, REG_DP_MAINLINK_CTRL, value);
849 dp_write_link(catalog, REG_DP_HBR2_COMPLIANCE_SCRAMBLER_RESET,
852 dp_write_link(catalog, REG_DP_HBR2_COMPLIANCE_SCRAMBLER_RESET,
854 dp_write_link(catalog, REG_DP_MAINLINK_LEVELS,
856 dp_write_link(catalog, REG_DP_STATE_CTRL,
858 value = dp_read_link(catalog, REG_DP_MAINLINK_CTRL);
860 dp_write_link(catalog, REG_DP_MAINLINK_CTRL, value);
863 dp_write_link(catalog, REG_DP_MAINLINK_CTRL,
865 dp_write_link(catalog, REG_DP_STATE_CTRL,
869 drm_dbg_dp(catalog->drm_dev,
877 struct dp_catalog_private *catalog = container_of(dp_catalog,
880 return dp_read_link(catalog, REG_DP_MAINLINK_READY);
883 /* panel related catalog functions */
887 struct dp_catalog_private *catalog = container_of(dp_catalog,
891 dp_write_link(catalog, REG_DP_TOTAL_HOR_VER, total);
892 dp_write_link(catalog, REG_DP_START_HOR_VER_FROM_SYNC, sync_start);
893 dp_write_link(catalog, REG_DP_HSYNC_VSYNC_WIDTH_POLARITY, width_blanking);
894 dp_write_link(catalog, REG_DP_ACTIVE_HOR_VER, dp_active);
896 reg = dp_read_p0(catalog, MMSS_DP_INTF_CONFIG);
906 dp_write_p0(catalog, MMSS_DP_INTF_CONFIG, reg);
912 struct dp_catalog_private *catalog;
917 catalog = container_of(dp_catalog, struct dp_catalog_private, dp_catalog);
921 dp_write_link(catalog, MMSS_DP_GENERIC0_0, header[0]);
922 dp_write_link(catalog, MMSS_DP_GENERIC0_1, header[1]);
927 dp_write_link(catalog, MMSS_DP_GENERIC0_2 + i, val);
933 struct dp_catalog_private *catalog;
936 catalog = container_of(dp_catalog, struct dp_catalog_private, dp_catalog);
940 dp_write_link(catalog, MMSS_DP_SDP_CFG3, 0x01);
941 dp_write_link(catalog, MMSS_DP_SDP_CFG3, 0x00);
947 struct dp_catalog_private *catalog;
950 catalog = container_of(dp_catalog, struct dp_catalog_private, dp_catalog);
952 cfg = dp_read_link(catalog, MMSS_DP_SDP_CFG);
953 cfg2 = dp_read_link(catalog, MMSS_DP_SDP_CFG2);
954 misc = dp_read_link(catalog, REG_DP_MISC1_MISC0);
957 dp_write_link(catalog, MMSS_DP_SDP_CFG, cfg);
960 dp_write_link(catalog, MMSS_DP_SDP_CFG2, cfg2);
967 drm_dbg_dp(catalog->drm_dev, "vsc sdp enable=1\n");
970 dp_write_link(catalog, REG_DP_MISC1_MISC0, misc);
977 struct dp_catalog_private *catalog;
980 catalog = container_of(dp_catalog, struct dp_catalog_private, dp_catalog);
982 cfg = dp_read_link(catalog, MMSS_DP_SDP_CFG);
983 cfg2 = dp_read_link(catalog, MMSS_DP_SDP_CFG2);
984 misc = dp_read_link(catalog, REG_DP_MISC1_MISC0);
987 dp_write_link(catalog, MMSS_DP_SDP_CFG, cfg);
990 dp_write_link(catalog, MMSS_DP_SDP_CFG2, cfg2);
995 drm_dbg_dp(catalog->drm_dev, "vsc sdp enable=0\n");
998 dp_write_link(catalog, REG_DP_MISC1_MISC0, misc);
1006 struct dp_catalog_private *catalog = container_of(dp_catalog,
1039 dp_write_p0(catalog, MMSS_DP_INTF_CONFIG, 0x0);
1040 dp_write_p0(catalog, MMSS_DP_INTF_HSYNC_CTL, hsync_ctl);
1041 dp_write_p0(catalog, MMSS_DP_INTF_VSYNC_PERIOD_F0, vsync_period *
1043 dp_write_p0(catalog, MMSS_DP_INTF_VSYNC_PULSE_WIDTH_F0, v_sync_width *
1045 dp_write_p0(catalog, MMSS_DP_INTF_VSYNC_PERIOD_F1, 0);
1046 dp_write_p0(catalog, MMSS_DP_INTF_VSYNC_PULSE_WIDTH_F1, 0);
1047 dp_write_p0(catalog, MMSS_DP_INTF_DISPLAY_HCTL, display_hctl);
1048 dp_write_p0(catalog, MMSS_DP_INTF_ACTIVE_HCTL, 0);
1049 dp_write_p0(catalog, MMSS_INTF_DISPLAY_V_START_F0, display_v_start);
1050 dp_write_p0(catalog, MMSS_DP_INTF_DISPLAY_V_END_F0, display_v_end);
1051 dp_write_p0(catalog, MMSS_INTF_DISPLAY_V_START_F1, 0);
1052 dp_write_p0(catalog, MMSS_DP_INTF_DISPLAY_V_END_F1, 0);
1053 dp_write_p0(catalog, MMSS_DP_INTF_ACTIVE_V_START_F0, 0);
1054 dp_write_p0(catalog, MMSS_DP_INTF_ACTIVE_V_END_F0, 0);
1055 dp_write_p0(catalog, MMSS_DP_INTF_ACTIVE_V_START_F1, 0);
1056 dp_write_p0(catalog, MMSS_DP_INTF_ACTIVE_V_END_F1, 0);
1057 dp_write_p0(catalog, MMSS_DP_INTF_POLARITY_CTL, 0);
1059 dp_write_p0(catalog, MMSS_DP_TPG_MAIN_CONTROL,
1061 dp_write_p0(catalog, MMSS_DP_TPG_VIDEO_CONFIG,
1064 dp_write_p0(catalog, MMSS_DP_BIST_ENABLE,
1066 dp_write_p0(catalog, MMSS_DP_TIMING_ENGINE_EN,
1068 drm_dbg_dp(catalog->drm_dev, "%s: enabled tpg\n", __func__);
1073 struct dp_catalog_private *catalog = container_of(dp_catalog,
1076 dp_write_p0(catalog, MMSS_DP_TPG_MAIN_CONTROL, 0x0);
1077 dp_write_p0(catalog, MMSS_DP_BIST_ENABLE, 0x0);
1078 dp_write_p0(catalog, MMSS_DP_TIMING_ENGINE_EN, 0x0);
1093 static int dp_catalog_get_io(struct dp_catalog_private *catalog)
1095 struct platform_device *pdev = to_platform_device(catalog->dev);
1096 struct dss_io_data *dss = &catalog->io;
1147 struct dp_catalog_private *catalog;
1150 catalog = devm_kzalloc(dev, sizeof(*catalog), GFP_KERNEL);
1151 if (!catalog)
1154 catalog->dev = dev;
1156 ret = dp_catalog_get_io(catalog);
1160 return &catalog->dp_catalog;
1167 struct dp_catalog_private *catalog;
1170 catalog = container_of(dp_catalog,
1173 sdp_map = catalog->audio_map;
1175 return dp_read_link(catalog, sdp_map[sdp][header]);
1183 struct dp_catalog_private *catalog;
1189 catalog = container_of(dp_catalog,
1192 sdp_map = catalog->audio_map;
1194 dp_write_link(catalog, sdp_map[sdp][header], data);
1199 struct dp_catalog_private *catalog;
1205 catalog = container_of(dp_catalog,
1210 drm_dbg_dp(catalog->drm_dev, "select: %#x, acr_ctrl: %#x\n",
1213 dp_write_link(catalog, MMSS_DP_AUDIO_ACR_CTRL, acr_ctrl);
1218 struct dp_catalog_private *catalog;
1224 catalog = container_of(dp_catalog,
1227 audio_ctrl = dp_read_link(catalog, MMSS_DP_AUDIO_CFG);
1234 drm_dbg_dp(catalog->drm_dev, "dp_audio_cfg = 0x%x\n", audio_ctrl);
1236 dp_write_link(catalog, MMSS_DP_AUDIO_CFG, audio_ctrl);
1243 struct dp_catalog_private *catalog;
1250 catalog = container_of(dp_catalog,
1253 sdp_cfg = dp_read_link(catalog, MMSS_DP_SDP_CFG);
1265 drm_dbg_dp(catalog->drm_dev, "sdp_cfg = 0x%x\n", sdp_cfg);
1267 dp_write_link(catalog, MMSS_DP_SDP_CFG, sdp_cfg);
1269 sdp_cfg2 = dp_read_link(catalog, MMSS_DP_SDP_CFG2);
1275 drm_dbg_dp(catalog->drm_dev, "sdp_cfg2 = 0x%x\n", sdp_cfg2);
1277 dp_write_link(catalog, MMSS_DP_SDP_CFG2, sdp_cfg2);
1282 struct dp_catalog_private *catalog;
1315 catalog = container_of(dp_catalog,
1318 catalog->audio_map = sdp_map;
1323 struct dp_catalog_private *catalog;
1329 catalog = container_of(dp_catalog,
1332 mainlink_levels = dp_read_link(catalog, REG_DP_MAINLINK_LEVELS);
1336 drm_dbg_dp(catalog->drm_dev,
1340 dp_write_link(catalog, REG_DP_MAINLINK_LEVELS, mainlink_levels);