disp/dpu1/dpu_rm.c

38 		struct dpu_rm *rm,
45 	if (!rm || !cat || !mmio) {
51 	memset(rm, 0, sizeof(*rm));
64 		rm->mixer_blks[lm->id - LM_0] = &hw->base;
78 		rm->merge_3d_blks[merge_3d->id - MERGE_3D_0] = &hw->base;
93 			hw->merge_3d = to_dpu_hw_merge_3d(rm->merge_3d_blks[pp->merge_3d - MERGE_3D_0]);
94 		rm->pingpong_blks[pp->id - PINGPONG_0] = &hw->base;
107 		rm->hw_intf[intf->id - INTF_0] = hw;
120 		rm->hw_wb[wb->id - WB_0] = hw;
133 		rm->ctl_blks[ctl->id - CTL_0] = &hw->base;
146 		rm->dspp_blks[dspp->id - DSPP_0] = &hw->base;
163 		rm->dsc_blks[dsc->id - DSC_0] = &hw->base;
176 		rm->hw_sspp[sspp->id - SSPP_NONE] = hw;
188 		rm->cdm_blk = &hw->base;
204  * @rm: dpu resource manager handle
205  * @primary_idx: index of primary mixer in rm->mixer_blks[]
209 static int _dpu_rm_get_lm_peer(struct dpu_rm *rm, int primary_idx)
213 	prim_lm_cfg = to_dpu_hw_mixer(rm->mixer_blks[primary_idx])->cap;
224  * @rm: dpu resource manager handle
227  * @lm_idx: index of proposed layer mixer in rm->mixer_blks[], function checks
231  *      mixer in rm->pingpong_blks[].
233  *      mixer in rm->dspp_blks[].
234  * @reqs: input parameter, rm requirements for HW blocks needed in the
238 static bool _dpu_rm_check_lm_and_get_connected_blks(struct dpu_rm *rm,
252 	lm_cfg = to_dpu_hw_mixer(rm->mixer_blks[lm_idx])->cap;
254 	if (idx < 0 || idx >= ARRAY_SIZE(rm->pingpong_blks)) {
270 	if (idx < 0 || idx >= ARRAY_SIZE(rm->dspp_blks)) {
285 static int _dpu_rm_reserve_lms(struct dpu_rm *rm,
302 	for (i = 0; i < ARRAY_SIZE(rm->mixer_blks) &&
304 		if (!rm->mixer_blks[i])
310 		if (!_dpu_rm_check_lm_and_get_connected_blks(rm, global_state,
320 			int j = _dpu_rm_get_lm_peer(rm, i);
326 			if (!rm->mixer_blks[j])
329 			if (!_dpu_rm_check_lm_and_get_connected_blks(rm,
360 		struct dpu_rm *rm,
374 	for (j = 0; j < ARRAY_SIZE(rm->ctl_blks); j++) {
379 		if (!rm->ctl_blks[j])
384 		ctl = to_dpu_hw_ctl(rm->ctl_blks[j]);
438 static int _dpu_rm_dsc_alloc(struct dpu_rm *rm,
448 	for (dsc_idx = 0; dsc_idx < ARRAY_SIZE(rm->dsc_blks) &&
450 		if (!rm->dsc_blks[dsc_idx])
478 static int _dpu_rm_dsc_alloc_pair(struct dpu_rm *rm,
488 	for (dsc_idx = 0; dsc_idx < ARRAY_SIZE(rm->dsc_blks) &&
490 		if (!rm->dsc_blks[dsc_idx] ||
491 		    !rm->dsc_blks[dsc_idx + 1])
534 static int _dpu_rm_reserve_dsc(struct dpu_rm *rm,
556 		return _dpu_rm_dsc_alloc_pair(rm, global_state, enc_id, top);
558 		return _dpu_rm_dsc_alloc(rm, global_state, enc_id, top);
563 static int _dpu_rm_reserve_cdm(struct dpu_rm *rm,
568 	if (!rm->cdm_blk) {
584 		struct dpu_rm *rm,
591 	ret = _dpu_rm_reserve_lms(rm, global_state, enc->base.id, reqs);
597 	ret = _dpu_rm_reserve_ctls(rm, global_state, enc->base.id,
604 	ret  = _dpu_rm_reserve_dsc(rm, global_state, enc, &reqs->topology);
609 		ret = _dpu_rm_reserve_cdm(rm, global_state, enc);
661 		struct dpu_rm *rm,
688 	ret = _dpu_rm_make_reservation(rm, global_state, enc, &reqs);
697 int dpu_rm_get_assigned_resources(struct dpu_rm *rm,
707 		hw_blks = rm->pingpong_blks;
709 		max_blks = ARRAY_SIZE(rm->pingpong_blks);
712 		hw_blks = rm->mixer_blks;
714 		max_blks = ARRAY_SIZE(rm->mixer_blks);
717 		hw_blks = rm->ctl_blks;
719 		max_blks = ARRAY_SIZE(rm->ctl_blks);
722 		hw_blks = rm->dspp_blks;
724 		max_blks = ARRAY_SIZE(rm->dspp_blks);
727 		hw_blks = rm->dsc_blks;
729 		max_blks = ARRAY_SIZE(rm->dsc_blks);
732 		hw_blks = &rm->cdm_blk;
737 		DPU_ERROR("blk type %d not managed by rm\n", type);
778 	const struct dpu_rm *rm = global_state->rm;
784 		dpu_rm_print_state_helper(p, rm->pingpong_blks[i],
790 		dpu_rm_print_state_helper(p, rm->mixer_blks[i],
796 		dpu_rm_print_state_helper(p, rm->ctl_blks[i],
802 		dpu_rm_print_state_helper(p, rm->dspp_blks[i],
808 		dpu_rm_print_state_helper(p, rm->dsc_blks[i],
813 	dpu_rm_print_state_helper(p, rm->cdm_blk,