disp/dpu1/dpu_encoder_phys.h

63 struct dpu_encoder_phys;
94 	void (*prepare_commit)(struct dpu_encoder_phys *encoder);
95 	bool (*is_master)(struct dpu_encoder_phys *encoder);
96 	void (*enable)(struct dpu_encoder_phys *encoder);
97 	void (*disable)(struct dpu_encoder_phys *encoder);
98 	int (*control_vblank_irq)(struct dpu_encoder_phys *enc, bool enable);
99 	int (*wait_for_commit_done)(struct dpu_encoder_phys *phys_enc);
100 	int (*wait_for_tx_complete)(struct dpu_encoder_phys *phys_enc);
101 	void (*prepare_for_kickoff)(struct dpu_encoder_phys *phys_enc);
102 	void (*handle_post_kickoff)(struct dpu_encoder_phys *phys_enc);
103 	void (*trigger_start)(struct dpu_encoder_phys *phys_enc);
104 	bool (*needs_single_flush)(struct dpu_encoder_phys *phys_enc);
105 	void (*irq_enable)(struct dpu_encoder_phys *phys);
106 	void (*irq_disable)(struct dpu_encoder_phys *phys);
107 	void (*prepare_idle_pc)(struct dpu_encoder_phys *phys_enc);
108 	void (*restore)(struct dpu_encoder_phys *phys);
109 	int (*get_line_count)(struct dpu_encoder_phys *phys);
110 	int (*get_frame_count)(struct dpu_encoder_phys *phys);
111 	void (*prepare_wb_job)(struct dpu_encoder_phys *phys_enc,
113 	void (*cleanup_wb_job)(struct dpu_encoder_phys *phys_enc,
115 	bool (*is_valid_for_commit)(struct dpu_encoder_phys *phys_enc);
137  * struct dpu_encoder_phys - physical encoder that drives a single INTF block
171 struct dpu_encoder_phys {
198 static inline int dpu_encoder_phys_inc_pending(struct dpu_encoder_phys *phys)
205  * struct dpu_encoder_phys_wb - sub-class of dpu_encoder_phys to handle command
216 	struct dpu_encoder_phys base;
226  * struct dpu_encoder_phys_cmd - sub-class of dpu_encoder_phys to handle command
238 	struct dpu_encoder_phys base;
282 struct dpu_encoder_phys *dpu_encoder_phys_vid_init(struct drm_device *dev,
291 struct dpu_encoder_phys *dpu_encoder_phys_cmd_init(struct drm_device *dev,
299 struct dpu_encoder_phys *dpu_encoder_phys_wb_init(struct drm_device *dev,
308 void dpu_encoder_helper_trigger_start(struct dpu_encoder_phys *phys_enc);
311 		struct dpu_encoder_phys *phys_enc)
335 unsigned int dpu_encoder_helper_get_dsc(struct dpu_encoder_phys *phys_enc);
341 u32 dpu_encoder_get_drm_fmt(struct dpu_encoder_phys *phys_enc);
348 bool dpu_encoder_needs_periph_flush(struct dpu_encoder_phys *phys_enc);
358 		struct dpu_encoder_phys *phys_enc,
367 void dpu_encoder_helper_report_irq_timeout(struct dpu_encoder_phys *phys_enc,
379 int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc,
388 void dpu_encoder_helper_phys_cleanup(struct dpu_encoder_phys *phys_enc);
395 void dpu_encoder_helper_phys_setup_cdm(struct dpu_encoder_phys *phys_enc,
406 				 struct dpu_encoder_phys *phy_enc);
414 				   struct dpu_encoder_phys *phy_enc);
423 		struct dpu_encoder_phys *ready_phys, u32 event);
425 void dpu_encoder_phys_init(struct dpu_encoder_phys *phys,