Lines Matching defs:offset
174 static int debugbus_read(struct msm_gpu *gpu, u32 block, u32 offset,
177 u32 reg = A6XX_DBGC_CFG_DBGBUS_SEL_D_PING_INDEX(offset) |
194 #define cxdbg_write(ptr, offset, val) \
195 msm_writel((val), (ptr) + ((offset) << 2))
197 #define cxdbg_read(ptr, offset) \
198 msm_readl((ptr) + ((offset) << 2))
201 static int cx_debugbus_read(void __iomem *cxdbg, u32 block, u32 offset,
204 u32 reg = A6XX_CX_DBGC_CFG_DBGBUS_SEL_A_PING_INDEX(offset) |
556 u32 offset = REG_A6XX_HLSQ_DBG_AHB_READ_APERTURE +
559 in += CRASHDUMP_READ(in, offset, count, out);
601 u32 offset = REG_A7XX_SP_AHB_READ_APERTURE +
604 in += CRASHDUMP_READ(in, offset, count, out);
986 u32 offset = REG_A6XX_HLSQ_DBG_AHB_READ_APERTURE +
989 in += CRASHDUMP_READ(in, offset, count, out);
1180 u32 offset = regs->registers[i] + j;
1184 val = gmu_read_rscc(gmu, offset);
1186 val = gmu_read(gmu, offset);
1410 * Program the SQE_UCODE_DBG_ADDR with offset=0x70d3 and read the value.
1651 u32 offset = registers[i];
1654 for (j = 0; j < count; index++, offset++, j++) {
1658 drm_printf(p, " - { offset: 0x%06x, value: 0x%08x }\n",
1659 offset << 2, data[index]);
1671 u32 offset = registers[i];
1674 for (j = 0; j < count; index++, offset++, j++) {
1682 drm_printf(p, "- { offset: 0x%06x, value: 0x%08x }\n",
1683 offset << 2, data[index]);
1790 u32 offset = registers[j];
1793 for (k = 0; k < count; index++, offset++, k++) {
1797 drm_printf(p, " - { offset: 0x%06x, value: 0x%08x }\n",
1798 offset << 2, data[index]);