msm/adreno/a6xx_gpu_state.c

67 static inline int CRASHDUMP_WRITE(u64 *in, u32 reg, u32 val)
69 	in[0] = val;
70 	in[1] = (((u64) reg) << 44 | (1 << 21) | 1);
75 static inline int CRASHDUMP_READ(u64 *in, u32 reg, u32 dwords, u64 target)
77 	in[0] = target;
78 	in[1] = (((u64) reg) << 44 | dwords);
83 static inline int CRASHDUMP_FINI(u64 *in)
85 	in[0] = 0;
86 	in[1] = 0;
450 	/* Set up the CX debug bus - it lives elsewhere in the system so do a
543 	u64 *in = dumper->ptr;
551 		in += CRASHDUMP_WRITE(in, REG_A6XX_HLSQ_DBG_READ_SEL,
559 			in += CRASHDUMP_READ(in, offset, count, out);
568 	CRASHDUMP_FINI(in);
589 	u64 *in = dumper->ptr;
594 	in += CRASHDUMP_WRITE(in, REG_A7XX_SP_READ_SEL,
604 		in += CRASHDUMP_READ(in, offset, count, out);
610 	CRASHDUMP_FINI(in);
687 	u64 *in = dumper->ptr;
704 		in += CRASHDUMP_WRITE(in, cluster->sel_reg, cluster->sel_val);
709 		in += CRASHDUMP_WRITE(in, REG_A6XX_CP_APERTURE_CNTL_CD,
715 			in += CRASHDUMP_READ(in, cluster->registers[j],
725 	CRASHDUMP_FINI(in);
746 	u64 *in = dumper->ptr;
753 		in += CRASHDUMP_WRITE(in, cluster->sel->cd_reg, cluster->sel->val);
755 	in += CRASHDUMP_WRITE(in, REG_A7XX_CP_APERTURE_CNTL_CD,
763 		in += CRASHDUMP_READ(in, cluster->regs[i],
770 	CRASHDUMP_FINI(in);
842 	u64 *in = dumper->ptr;
851 		in += CRASHDUMP_WRITE(in, REG_A6XX_HLSQ_DBG_READ_SEL,
854 		in += CRASHDUMP_READ(in, REG_A6XX_HLSQ_DBG_AHB_READ_APERTURE,
860 	CRASHDUMP_FINI(in);
877 	u64 *in = dumper->ptr;
891 			in += CRASHDUMP_WRITE(in, REG_A7XX_SP_READ_SEL,
898 			in += CRASHDUMP_READ(in, REG_A7XX_SP_AHB_READ_APERTURE,
905 	CRASHDUMP_FINI(in);
978 	u64 *in = dumper->ptr;
982 	in += CRASHDUMP_WRITE(in, REG_A6XX_HLSQ_DBG_READ_SEL, regs->val1);
989 		in += CRASHDUMP_READ(in, offset, count, out);
995 	CRASHDUMP_FINI(in);
1016 	u64 *in = dumper->ptr;
1027 		in += CRASHDUMP_WRITE(in, regs->val0, regs->val1);
1032 		in += CRASHDUMP_READ(in, regs->registers[i], count, out);
1038 	CRASHDUMP_FINI(in);
1058 	u64 *in = dumper->ptr;
1064 		in += CRASHDUMP_WRITE(in, regs->sel->cd_reg, regs->sel->val);
1069 		in += CRASHDUMP_READ(in, regs->regs[i], count, out);
1075 	CRASHDUMP_FINI(in);
1348 	/* The downstream reglist contains registers in other memory regions
1401 	/* The value at [16:31] is in 4dword units. Convert it to dwords */
1408 	 * The value at CP_ROQ_THRESHOLDS_2[20:31] is in 4dword units.
1481 	 * Offset 0x2000 in the mempool is the size - copy the saved size over
1486 	/* Restore the size in the hardware */
1568 	 * stalled in response to an iova fault
1877 		 * count for regular debugbus data is in quadwords,
1878 		 * but print the size in dwords for consistency
1903 		/* vbif debugbus data is in dwords.  Confusing, huh? */