drm/i915/intel_pcode.c

10 static int gen6_check_mailbox_status(u32 mbox)
12 	switch (mbox & GEN6_PCODE_ERROR_MASK) {
25 		MISSING_CASE(mbox & GEN6_PCODE_ERROR_MASK);
30 static int gen7_check_mailbox_status(u32 mbox)
32 	switch (mbox & GEN6_PCODE_ERROR_MASK) {
50 		MISSING_CASE(mbox & GEN6_PCODE_ERROR_MASK);
55 static int __snb_pcode_rw(struct intel_uncore *uncore, u32 mbox,
74 			      GEN6_PCODE_MAILBOX, GEN6_PCODE_READY | mbox);
81 					 &mbox))
90 		return gen7_check_mailbox_status(mbox);
92 		return gen6_check_mailbox_status(mbox);
95 int snb_pcode_read(struct intel_uncore *uncore, u32 mbox, u32 *val, u32 *val1)
100 	err = __snb_pcode_rw(uncore, mbox, val, val1, 500, 20, true);
105 			"warning: pcode (read from mbox %x) mailbox access failed for %ps: %d\n",
106 			mbox, __builtin_return_address(0), err);
112 int snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val,
118 	err = __snb_pcode_rw(uncore, mbox, &val, NULL,
124 			"warning: pcode (write of 0x%08x to mbox %x) mailbox access failed for %ps: %d\n",
125 			val, mbox, __builtin_return_address(0), err);
131 static bool skl_pcode_try_request(struct intel_uncore *uncore, u32 mbox,
135 	*status = __snb_pcode_rw(uncore, mbox, &request, NULL, 500, 0, true);
143  * @mbox: PCODE mailbox ID the request is targeted for
149  * Keep resending the @request to @mbox until PCODE acknowledges it, PCODE
159 int skl_pcode_request(struct intel_uncore *uncore, u32 mbox, u32 request,
168 	skl_pcode_try_request(uncore, mbox, request, reply_mask, reply, &status)
248 	u32 mbox;
251 	mbox = REG_FIELD_PREP(GEN6_PCODE_MB_COMMAND, mbcmd)
256 		err = snb_pcode_read(uncore, mbox, val, NULL);
264 	u32 mbox;
267 	mbox = REG_FIELD_PREP(GEN6_PCODE_MB_COMMAND, mbcmd)
272 		err = snb_pcode_write(uncore, mbox, val);