Lines Matching refs:VLV_DISPLAY_BASE
164 #define VLV_IOSF_DOORBELL_REQ _MMIO(VLV_DISPLAY_BASE + 0x2100)
186 #define VLV_IOSF_DATA _MMIO(VLV_DISPLAY_BASE + 0x2104)
187 #define VLV_IOSF_ADDR _MMIO(VLV_DISPLAY_BASE + 0x2108)
192 #define DPIO_CTL _MMIO(VLV_DISPLAY_BASE + 0x2110)
392 #define CLAIM_ER _MMIO(VLV_DISPLAY_BASE + 0x2028)
416 #define VLV_GU_CTL0 _MMIO(VLV_DISPLAY_BASE + 0x2030)
417 #define VLV_GU_CTL1 _MMIO(VLV_DISPLAY_BASE + 0x2034)
425 #define VLV_GUNIT_CLOCK_GATE _MMIO(VLV_DISPLAY_BASE + 0x2060)
428 #define VLV_GUNIT_CLOCK_GATE2 _MMIO(VLV_DISPLAY_BASE + 0x2064)
429 #define VLV_IIR_RW _MMIO(VLV_DISPLAY_BASE + 0x2084)
430 #define VLV_IER _MMIO(VLV_DISPLAY_BASE + 0x20a0)
431 #define VLV_IIR _MMIO(VLV_DISPLAY_BASE + 0x20a4)
432 #define VLV_IMR _MMIO(VLV_DISPLAY_BASE + 0x20a8)
433 #define VLV_ISR _MMIO(VLV_DISPLAY_BASE + 0x20ac)
434 #define VLV_PCBR _MMIO(VLV_DISPLAY_BASE + 0x2120)
712 #define DPIO_PHY_STATUS _MMIO(VLV_DISPLAY_BASE + 0x6240)
714 #define DISPLAY_PHY_CONTROL _MMIO(VLV_DISPLAY_BASE + 0x60100)
725 #define DISPLAY_PHY_STATUS _MMIO(VLV_DISPLAY_BASE + 0x60104)
811 #define RAWCLK_FREQ_VLV _MMIO(VLV_DISPLAY_BASE + 0x6024)
958 #define FW_BLC_SELF_VLV _MMIO(VLV_DISPLAY_BASE + 0x6500)
961 #define MI_ARB_VLV _MMIO(VLV_DISPLAY_BASE + 0x6504)
963 #define CZCLK_CDCLK_FREQ_RATIO _MMIO(VLV_DISPLAY_BASE + 0x6508)
968 #define GCI_CONTROL _MMIO(VLV_DISPLAY_BASE + 0x650C)
975 #define GMBUSFREQ_VLV _MMIO(VLV_DISPLAY_BASE + 0x6510)
1334 #define VLV_ADPA _MMIO(VLV_DISPLAY_BASE + 0x61100)
1472 #define VLV_HDMIB _MMIO(VLV_DISPLAY_BASE + 0x61140)
1473 #define VLV_HDMIC _MMIO(VLV_DISPLAY_BASE + 0x61160)
1474 #define CHV_HDMID _MMIO(VLV_DISPLAY_BASE + 0x6116C)
1631 #define VLV_DP_B _MMIO(VLV_DISPLAY_BASE + 0x64100)
1632 #define VLV_DP_C _MMIO(VLV_DISPLAY_BASE + 0x64200)
1633 #define CHV_DP_D _MMIO(VLV_DISPLAY_BASE + 0x64300)
1942 #define VLV_DPFLIPSTAT _MMIO(VLV_DISPLAY_BASE + 0x70028)
1963 #define DPINVGTT _MMIO(VLV_DISPLAY_BASE + 0x7002c) /* VLV/CHV only */
2008 #define DSPARB2 _MMIO(VLV_DISPLAY_BASE + 0x70060) /* vlv/chv */
2021 #define DSPARB3 _MMIO(VLV_DISPLAY_BASE + 0x7006c) /* chv */
2066 #define DSPFW4 _MMIO(VLV_DISPLAY_BASE + 0x70070)
2073 #define DSPFW5 _MMIO(VLV_DISPLAY_BASE + 0x70074)
2082 #define DSPFW6 _MMIO(VLV_DISPLAY_BASE + 0x70078)
2085 #define DSPFW7 _MMIO(VLV_DISPLAY_BASE + 0x7007c)
2086 #define DSPFW7_CHV _MMIO(VLV_DISPLAY_BASE + 0x700b4) /* wtf #1? */
2095 #define DSPFW8_CHV _MMIO(VLV_DISPLAY_BASE + 0x700b8)
2104 #define DSPFW9_CHV _MMIO(VLV_DISPLAY_BASE + 0x7007c) /* wtf #2? */
2115 #define DSPHOWM _MMIO(VLV_DISPLAY_BASE + 0x70064)
2136 #define DSPHOWM1 _MMIO(VLV_DISPLAY_BASE + 0x70068)
2159 #define VLV_DDL(pipe) _MMIO(VLV_DISPLAY_BASE + 0x70050 + 4 * (pipe))
2167 #define CBR1_VLV _MMIO(VLV_DISPLAY_BASE + 0x70400)
2171 #define CBR4_VLV _MMIO(VLV_DISPLAY_BASE + 0x70450)
2843 #define VLV_VGACNTRL _MMIO(VLV_DISPLAY_BASE + 0x71400)
3923 #define VLV_TVIDEO_DIP_CTL(pipe) _MMIO_BASE_PIPE3(VLV_DISPLAY_BASE, (pipe), \
3931 #define VLV_TVIDEO_DIP_DATA(pipe) _MMIO_BASE_PIPE3(VLV_DISPLAY_BASE, (pipe), \
3939 #define VLV_TVIDEO_DIP_GCP(pipe) _MMIO_BASE_PIPE3(VLV_DISPLAY_BASE, (pipe), \
4223 #define VLV_CHICKEN_3 _MMIO(VLV_DISPLAY_BASE + 0x7040C)