Lines Matching refs:pmu
36 return container_of(event->pmu, struct i915_pmu, base);
39 static struct drm_i915_private *pmu_to_i915(struct i915_pmu *pmu)
41 return container_of(pmu, struct drm_i915_private, pmu);
152 static bool pmu_needs_timer(struct i915_pmu *pmu)
154 struct drm_i915_private *i915 = pmu_to_i915(pmu);
162 enable = pmu->enable;
204 static u64 read_sample(struct i915_pmu *pmu, unsigned int gt_id, int sample)
206 return pmu->sample[gt_id][sample].cur;
210 store_sample(struct i915_pmu *pmu, unsigned int gt_id, int sample, u64 val)
212 pmu->sample[gt_id][sample].cur = val;
216 add_sample_mult(struct i915_pmu *pmu, unsigned int gt_id, int sample, u32 val, u32 mul)
218 pmu->sample[gt_id][sample].cur += mul_u32_u32(val, mul);
225 struct i915_pmu *pmu = &i915->pmu;
236 spin_lock_irqsave(&pmu->lock, flags);
239 store_sample(pmu, gt_id, __I915_SAMPLE_RC6, val);
248 val = ktime_since_raw(pmu->sleep_last[gt_id]);
249 val += read_sample(pmu, gt_id, __I915_SAMPLE_RC6);
252 if (val < read_sample(pmu, gt_id, __I915_SAMPLE_RC6_LAST_REPORTED))
253 val = read_sample(pmu, gt_id, __I915_SAMPLE_RC6_LAST_REPORTED);
255 store_sample(pmu, gt_id, __I915_SAMPLE_RC6_LAST_REPORTED, val);
257 spin_unlock_irqrestore(&pmu->lock, flags);
262 static void init_rc6(struct i915_pmu *pmu)
264 struct drm_i915_private *i915 = pmu_to_i915(pmu);
274 store_sample(pmu, i, __I915_SAMPLE_RC6, val);
275 store_sample(pmu, i, __I915_SAMPLE_RC6_LAST_REPORTED,
277 pmu->sleep_last[i] = ktime_get_raw();
284 struct i915_pmu *pmu = >->i915->pmu;
286 store_sample(pmu, gt->info.id, __I915_SAMPLE_RC6, __get_rc6(gt));
287 pmu->sleep_last[gt->info.id] = ktime_get_raw();
290 static void __i915_pmu_maybe_start_timer(struct i915_pmu *pmu)
292 if (!pmu->timer_enabled && pmu_needs_timer(pmu)) {
293 pmu->timer_enabled = true;
294 pmu->timer_last = ktime_get();
295 hrtimer_start_range_ns(&pmu->timer,
303 struct i915_pmu *pmu = >->i915->pmu;
305 if (!pmu->base.event_init)
308 spin_lock_irq(&pmu->lock);
316 pmu->unparked &= ~BIT(gt->info.id);
317 if (pmu->unparked == 0)
318 pmu->timer_enabled = false;
320 spin_unlock_irq(&pmu->lock);
325 struct i915_pmu *pmu = >->i915->pmu;
327 if (!pmu->base.event_init)
330 spin_lock_irq(&pmu->lock);
335 if (pmu->unparked == 0)
336 __i915_pmu_maybe_start_timer(pmu);
338 pmu->unparked |= BIT(gt->info.id);
340 spin_unlock_irq(&pmu->lock);
361 struct intel_engine_pmu *pmu = &engine->pmu;
370 add_sample(&pmu->sample[I915_SAMPLE_WAIT], period_ns);
372 add_sample(&pmu->sample[I915_SAMPLE_SEMA], period_ns);
391 add_sample(&pmu->sample[I915_SAMPLE_BUSY], period_ns);
402 if ((i915->pmu.enable & ENGINE_SAMPLE_MASK) == 0)
409 if (!engine->pmu.enable)
428 frequency_sampling_enabled(struct i915_pmu *pmu, unsigned int gt)
430 return pmu->enable &
440 struct i915_pmu *pmu = &i915->pmu;
444 if (!frequency_sampling_enabled(pmu, gt_id))
452 if (pmu->enable & config_mask(__I915_PMU_ACTUAL_FREQUENCY(gt_id))) {
468 add_sample_mult(pmu, gt_id, __I915_SAMPLE_FREQ_ACT,
472 if (pmu->enable & config_mask(__I915_PMU_REQUESTED_FREQUENCY(gt_id))) {
473 add_sample_mult(pmu, gt_id, __I915_SAMPLE_FREQ_REQ,
483 struct i915_pmu *pmu = container_of(hrtimer, struct i915_pmu, timer);
484 struct drm_i915_private *i915 = pmu_to_i915(pmu);
490 if (!READ_ONCE(pmu->timer_enabled))
494 period_ns = ktime_to_ns(ktime_sub(now, pmu->timer_last));
495 pmu->timer_last = now;
505 if (!(pmu->unparked & BIT(i)))
519 struct i915_pmu *pmu = event_to_pmu(event);
520 struct drm_i915_private *i915 = pmu_to_i915(pmu);
586 struct i915_pmu *pmu = event_to_pmu(event);
587 struct drm_i915_private *i915 = pmu_to_i915(pmu);
600 struct i915_pmu *pmu = event_to_pmu(event);
601 struct drm_i915_private *i915 = pmu_to_i915(pmu);
604 if (pmu->closed)
607 if (event->attr.type != event->pmu->type)
641 struct i915_pmu *pmu = event_to_pmu(event);
642 struct drm_i915_private *i915 = pmu_to_i915(pmu);
662 val = engine->pmu.sample[sample].cur;
671 div_u64(read_sample(pmu, gt_id,
677 div_u64(read_sample(pmu, gt_id,
682 val = READ_ONCE(pmu->irq_count);
698 struct i915_pmu *pmu = event_to_pmu(event);
702 if (pmu->closed) {
717 struct i915_pmu *pmu = event_to_pmu(event);
718 struct drm_i915_private *i915 = pmu_to_i915(pmu);
725 spin_lock_irqsave(&pmu->lock, flags);
731 BUILD_BUG_ON(ARRAY_SIZE(pmu->enable_count) != I915_PMU_MASK_BITS);
732 GEM_BUG_ON(bit >= ARRAY_SIZE(pmu->enable_count));
733 GEM_BUG_ON(pmu->enable_count[bit] == ~0);
735 pmu->enable |= BIT(bit);
736 pmu->enable_count[bit]++;
741 __i915_pmu_maybe_start_timer(pmu);
755 BUILD_BUG_ON(ARRAY_SIZE(engine->pmu.enable_count) !=
757 BUILD_BUG_ON(ARRAY_SIZE(engine->pmu.sample) !=
759 GEM_BUG_ON(sample >= ARRAY_SIZE(engine->pmu.enable_count));
760 GEM_BUG_ON(sample >= ARRAY_SIZE(engine->pmu.sample));
761 GEM_BUG_ON(engine->pmu.enable_count[sample] == ~0);
763 engine->pmu.enable |= BIT(sample);
764 engine->pmu.enable_count[sample]++;
767 spin_unlock_irqrestore(&pmu->lock, flags);
780 struct i915_pmu *pmu = event_to_pmu(event);
781 struct drm_i915_private *i915 = pmu_to_i915(pmu);
788 spin_lock_irqsave(&pmu->lock, flags);
798 GEM_BUG_ON(sample >= ARRAY_SIZE(engine->pmu.enable_count));
799 GEM_BUG_ON(sample >= ARRAY_SIZE(engine->pmu.sample));
800 GEM_BUG_ON(engine->pmu.enable_count[sample] == 0);
806 if (--engine->pmu.enable_count[sample] == 0)
807 engine->pmu.enable &= ~BIT(sample);
810 GEM_BUG_ON(bit >= ARRAY_SIZE(pmu->enable_count));
811 GEM_BUG_ON(pmu->enable_count[bit] == 0);
816 if (--pmu->enable_count[bit] == 0) {
817 pmu->enable &= ~BIT(bit);
818 pmu->timer_enabled &= pmu_needs_timer(pmu);
821 spin_unlock_irqrestore(&pmu->lock, flags);
826 struct i915_pmu *pmu = event_to_pmu(event);
828 if (pmu->closed)
838 container_of(event->pmu, typeof(*i915), pmu.base);
839 struct i915_pmu *pmu = &i915->pmu;
841 if (pmu->closed)
854 struct i915_pmu *pmu = event_to_pmu(event);
856 if (pmu->closed)
984 create_event_attributes(struct i915_pmu *pmu)
986 struct drm_i915_private *i915 = pmu_to_i915(pmu);
1119 pmu->i915_attr = i915_attr;
1120 pmu->pmu_attr = pmu_attr;
1136 static void free_event_attributes(struct i915_pmu *pmu)
1138 struct attribute **attr_iter = pmu->events_attr_group.attrs;
1143 kfree(pmu->events_attr_group.attrs);
1144 kfree(pmu->i915_attr);
1145 kfree(pmu->pmu_attr);
1147 pmu->events_attr_group.attrs = NULL;
1148 pmu->i915_attr = NULL;
1149 pmu->pmu_attr = NULL;
1154 struct i915_pmu *pmu = hlist_entry_safe(node, typeof(*pmu), cpuhp.node);
1156 GEM_BUG_ON(!pmu->base.event_init);
1167 struct i915_pmu *pmu = hlist_entry_safe(node, typeof(*pmu), cpuhp.node);
1170 GEM_BUG_ON(!pmu->base.event_init);
1176 if (pmu->closed)
1189 if (target < nr_cpu_ids && target != pmu->cpuhp.cpu) {
1190 perf_pmu_migrate_context(&pmu->base, cpu, target);
1191 pmu->cpuhp.cpu = target;
1222 static int i915_pmu_register_cpuhp_state(struct i915_pmu *pmu)
1227 return cpuhp_state_add_instance(cpuhp_slot, &pmu->cpuhp.node);
1230 static void i915_pmu_unregister_cpuhp_state(struct i915_pmu *pmu)
1232 cpuhp_state_remove_instance(cpuhp_slot, &pmu->cpuhp.node);
1248 struct i915_pmu *pmu = &i915->pmu;
1251 &pmu->events_attr_group,
1263 spin_lock_init(&pmu->lock);
1264 hrtimer_init(&pmu->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
1265 pmu->timer.function = i915_sample;
1266 pmu->cpuhp.cpu = -1;
1267 init_rc6(pmu);
1270 pmu->name = kasprintf(GFP_KERNEL,
1273 if (pmu->name) {
1275 strreplace((char *)pmu->name, ':', '_');
1278 pmu->name = "i915";
1280 if (!pmu->name)
1283 pmu->events_attr_group.name = "events";
1284 pmu->events_attr_group.attrs = create_event_attributes(pmu);
1285 if (!pmu->events_attr_group.attrs)
1288 pmu->base.attr_groups = kmemdup(attr_groups, sizeof(attr_groups),
1290 if (!pmu->base.attr_groups)
1293 pmu->base.module = THIS_MODULE;
1294 pmu->base.task_ctx_nr = perf_invalid_context;
1295 pmu->base.event_init = i915_pmu_event_init;
1296 pmu->base.add = i915_pmu_event_add;
1297 pmu->base.del = i915_pmu_event_del;
1298 pmu->base.start = i915_pmu_event_start;
1299 pmu->base.stop = i915_pmu_event_stop;
1300 pmu->base.read = i915_pmu_event_read;
1301 pmu->base.event_idx = i915_pmu_event_event_idx;
1303 ret = perf_pmu_register(&pmu->base, pmu->name, -1);
1307 ret = i915_pmu_register_cpuhp_state(pmu);
1314 perf_pmu_unregister(&pmu->base);
1316 kfree(pmu->base.attr_groups);
1318 pmu->base.event_init = NULL;
1319 free_event_attributes(pmu);
1322 kfree(pmu->name);
1329 struct i915_pmu *pmu = &i915->pmu;
1331 if (!pmu->base.event_init)
1339 pmu->closed = true;
1342 hrtimer_cancel(&pmu->timer);
1344 i915_pmu_unregister_cpuhp_state(pmu);
1346 perf_pmu_unregister(&pmu->base);
1347 pmu->base.event_init = NULL;
1348 kfree(pmu->base.attr_groups);
1350 kfree(pmu->name);
1351 free_event_attributes(pmu);