drm/i915/i915_hwmon.c

6 #include <linux/hwmon.h>
7 #include <linux/hwmon-sysfs.h>
19  * SF_* - scale factors for particular quantities according to hwmon spec.
47 	struct i915_hwmon *hwmon;
71 	struct i915_hwmon *hwmon = ddat->hwmon;
76 		mutex_lock(&hwmon->hwmon_lock);
80 		mutex_unlock(&hwmon->hwmon_lock);
120  * the hwmon API. Using x86_64 128 bit arithmetic (see mul_u64_u32_shr()),
122  * hwmon->scl_shift_energy of 14 bits we have 57 (63 - 20 + 14) bits before
129 	struct i915_hwmon *hwmon = ddat->hwmon;
136 		rgaddr = hwmon->rg.energy_status_tile;
138 		rgaddr = hwmon->rg.energy_status_all;
141 		mutex_lock(&hwmon->hwmon_lock);
152 					  hwmon->scl_shift_energy);
153 		mutex_unlock(&hwmon->hwmon_lock);
162 	struct i915_hwmon *hwmon = ddat->hwmon;
168 		r = intel_uncore_read(ddat->uncore, hwmon->rg.pkg_rapl_limit);
181 	/* val in hwmon interface units (millisec) */
182 	out = mul_u64_u32_shr(tau4, SF_TIME, hwmon->scl_shift_time + x_w);
193 	struct i915_hwmon *hwmon = ddat->hwmon;
205 	 * The hwmon->scl_shift_time default of 0xa results in a max tau of 256 seconds
210 	 * val must be < max in hwmon interface units. The steps below are
217 	max_win = mul_u64_u32_shr(tau4, SF_TIME, hwmon->scl_shift_time + x_w);
223 	val = DIV_ROUND_CLOSEST_ULL((u64)val << hwmon->scl_shift_time, SF_TIME);
237 	hwm_locked_with_pm_intel_uncore_rmw(ddat, hwmon->rg.pkg_rapl_limit,
256 	struct i915_hwmon *hwmon = ddat->hwmon;
259 		return i915_mmio_reg_valid(hwmon->rg.pkg_rapl_limit) ? attr->mode : 0;
320 	struct i915_hwmon *hwmon = ddat->hwmon;
327 			reg_value = intel_uncore_read(ddat->uncore, hwmon->rg.gt_perf_status);
340 	struct i915_hwmon *hwmon = ddat->hwmon;
345 		return i915_mmio_reg_valid(hwmon->rg.pkg_rapl_limit) ? 0664 : 0;
347 		return i915_mmio_reg_valid(hwmon->rg.pkg_power_sku) ? 0444 : 0;
367 	struct i915_hwmon *hwmon = ddat->hwmon;
373 		r = intel_uncore_read(ddat->uncore, hwmon->rg.pkg_rapl_limit);
380 					hwmon->rg.pkg_rapl_limit,
382 					hwmon->scl_shift_power,
386 		r = intel_uncore_read64(ddat->uncore, hwmon->rg.pkg_power_sku);
388 	min = mul_u64_u32_shr(min, SF_POWER, hwmon->scl_shift_power);
390 	max = mul_u64_u32_shr(max, SF_POWER, hwmon->scl_shift_power);
401 	struct i915_hwmon *hwmon = ddat->hwmon;
410 		mutex_lock(&hwmon->hwmon_lock);
414 		if (!hwmon->ddat.reset_in_progress)
422 		mutex_unlock(&hwmon->hwmon_lock);
433 		intel_uncore_rmw(ddat->uncore, hwmon->rg.pkg_rapl_limit,
435 		nval = intel_uncore_read(ddat->uncore, hwmon->rg.pkg_rapl_limit);
443 	nval = DIV_ROUND_CLOSEST_ULL((u64)val << hwmon->scl_shift_power, SF_POWER);
446 	intel_uncore_rmw(ddat->uncore, hwmon->rg.pkg_rapl_limit,
449 	mutex_unlock(&hwmon->hwmon_lock);
457 	struct i915_hwmon *hwmon = ddat->hwmon;
466 						hwmon->rg.pkg_power_sku,
468 						hwmon->scl_shift_power,
503 	struct i915_hwmon *hwmon = i915->hwmon;
506 	if (!hwmon || !i915_mmio_reg_valid(hwmon->rg.pkg_rapl_limit))
509 	mutex_lock(&hwmon->hwmon_lock);
511 	hwmon->ddat.reset_in_progress = true;
512 	r = intel_uncore_rmw(hwmon->ddat.uncore, hwmon->rg.pkg_rapl_limit,
516 	mutex_unlock(&hwmon->hwmon_lock);
521 	struct i915_hwmon *hwmon = i915->hwmon;
523 	if (!hwmon || !i915_mmio_reg_valid(hwmon->rg.pkg_rapl_limit))
526 	mutex_lock(&hwmon->hwmon_lock);
528 	intel_uncore_rmw(hwmon->ddat.uncore, hwmon->rg.pkg_rapl_limit,
530 	hwmon->ddat.reset_in_progress = false;
531 	wake_up_all(&hwmon->ddat.waitq);
533 	mutex_unlock(&hwmon->hwmon_lock);
539 	struct i915_hwmon *hwmon = ddat->hwmon;
545 			rgaddr = hwmon->rg.energy_status_tile;
547 			rgaddr = hwmon->rg.energy_status_all;
724 	struct i915_hwmon *hwmon = i915->hwmon;
726 	struct hwm_drvdata *ddat = &hwmon->ddat;
734 	hwmon->rg.gt_perf_status = GEN12_RPSTAT1;
737 		hwmon->rg.pkg_power_sku_unit = PCU_PACKAGE_POWER_SKU_UNIT;
738 		hwmon->rg.pkg_power_sku = PCU_PACKAGE_POWER_SKU;
739 		hwmon->rg.pkg_rapl_limit = PCU_PACKAGE_RAPL_LIMIT;
740 		hwmon->rg.energy_status_all = PCU_PACKAGE_ENERGY_STATUS;
741 		hwmon->rg.energy_status_tile = INVALID_MMIO_REG;
743 		hwmon->rg.pkg_power_sku_unit = INVALID_MMIO_REG;
744 		hwmon->rg.pkg_power_sku = INVALID_MMIO_REG;
745 		hwmon->rg.pkg_rapl_limit = INVALID_MMIO_REG;
746 		hwmon->rg.energy_status_all = INVALID_MMIO_REG;
747 		hwmon->rg.energy_status_tile = INVALID_MMIO_REG;
752 		 * The contents of register hwmon->rg.pkg_power_sku_unit do not change,
755 		if (i915_mmio_reg_valid(hwmon->rg.pkg_power_sku_unit))
757 							 hwmon->rg.pkg_power_sku_unit);
760 	hwmon->scl_shift_power = REG_FIELD_GET(PKG_PWR_UNIT, val_sku_unit);
761 	hwmon->scl_shift_energy = REG_FIELD_GET(PKG_ENERGY_UNIT, val_sku_unit);
762 	hwmon->scl_shift_time = REG_FIELD_GET(PKG_TIME_UNIT, val_sku_unit);
768 	if (i915_mmio_reg_valid(hwmon->rg.energy_status_all))
770 	if (i915_mmio_reg_valid(hwmon->rg.energy_status_tile)) {
772 			hwm_energy(&hwmon->ddat_gt[i], &energy);
779 	struct i915_hwmon *hwmon;
786 	/* hwmon is available only for dGfx */
790 	hwmon = kzalloc(sizeof(*hwmon), GFP_KERNEL);
791 	if (!hwmon)
794 	i915->hwmon = hwmon;
795 	mutex_init(&hwmon->hwmon_lock);
796 	ddat = &hwmon->ddat;
798 	ddat->hwmon = hwmon;
805 		ddat_gt = hwmon->ddat_gt + i;
807 		ddat_gt->hwmon = hwmon;
815 	/*  hwmon_dev points to device hwmon<i> */
826 		ddat_gt = hwmon->ddat_gt + i;
848 	struct i915_hwmon *hwmon = i915->hwmon;
852 	if (!hwmon)
856 		if (hwmon->ddat_gt[i].hwmon_dev)
857 			hwmon_device_unregister(hwmon->ddat_gt[i].hwmon_dev);
859 	if (hwmon->ddat.hwmon_dev)
860 		hwmon_device_unregister(hwmon->ddat.hwmon_dev);
862 	mutex_destroy(&hwmon->hwmon_lock);
864 	kfree(i915->hwmon);
865 	i915->hwmon = NULL;