Lines Matching refs:clock
453 * So the correct sequence to find DP stream clock is:
457 * Pixel clock = h_total * v_total * refresh_rate
458 * stream clock = Pixel clock
529 gvt_dbg_dpy("vgpu-%d PORT_%c has invalid clock select 0x%08x\n",
544 struct dpll clock = {};
573 clock.m1 = 2;
574 clock.m2 = REG_FIELD_GET(PORT_PLL_M2_INT_MASK,
577 clock.m2 |= REG_FIELD_GET(PORT_PLL_M2_FRAC_MASK,
579 clock.n = REG_FIELD_GET(PORT_PLL_N_MASK,
581 clock.p1 = REG_FIELD_GET(PORT_PLL_P1_MASK,
583 clock.p2 = REG_FIELD_GET(PORT_PLL_P2_MASK,
585 clock.m = clock.m1 * clock.m2;
586 clock.p = clock.p1 * clock.p2 * 5;
588 if (clock.n == 0 || clock.p == 0) {
593 clock.vco = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(refclk, clock.m), clock.n << 22);
594 clock.dot = DIV_ROUND_CLOSEST(clock.vco, clock.p);
596 dp_br = clock.dot;
672 /* Get DP link symbol clock M/N */
685 /* Calcuate pixel clock by (ls_clk * M / N) */