gt/uc/intel_guc.h

97 		void (*reset)(struct intel_guc *guc);
98 		void (*enable)(struct intel_guc *guc);
99 		void (*disable)(struct intel_guc *guc);
298 	 * @last_dead_guc_jiffies: timestamp of previous 'dead guc' occurrance
327 #define GUC_SUBMIT_VER(guc)		MAKE_GUC_VER_STRUCT((guc)->submission_version)
328 #define GUC_FIRMWARE_VER(guc)		MAKE_GUC_VER_STRUCT((guc)->fw.file_selected.ver)
336 inline int intel_guc_send(struct intel_guc *guc, const u32 *action, u32 len)
338 	return intel_guc_ct_send(&guc->ct, action, len, NULL, 0, 0);
342 inline int intel_guc_send_nb(struct intel_guc *guc, const u32 *action, u32 len,
345 	return intel_guc_ct_send(&guc->ct, action, len, NULL, 0,
350 intel_guc_send_and_receive(struct intel_guc *guc, const u32 *action, u32 len,
353 	return intel_guc_ct_send(&guc->ct, action, len,
357 static inline int intel_guc_send_busy_loop(struct intel_guc *guc,
378 	err = intel_guc_send_nb(guc, action, len, g2h_len_dw);
394 static inline void intel_guc_to_host_event_handler(struct intel_guc *guc)
396 	if (guc->interrupts.enabled)
397 		intel_guc_ct_event_handler(&guc->ct);
405  * @guc: intel_guc structure.
416 static inline u32 intel_guc_ggtt_offset(struct intel_guc *guc,
427 void intel_guc_init_early(struct intel_guc *guc);
428 void intel_guc_init_late(struct intel_guc *guc);
429 void intel_guc_init_send_regs(struct intel_guc *guc);
430 void intel_guc_write_params(struct intel_guc *guc);
431 int intel_guc_init(struct intel_guc *guc);
432 void intel_guc_fini(struct intel_guc *guc);
433 void intel_guc_notify(struct intel_guc *guc);
434 int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len,
436 int intel_guc_to_host_process_recv_msg(struct intel_guc *guc,
438 int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset);
439 int intel_guc_suspend(struct intel_guc *guc);
440 int intel_guc_resume(struct intel_guc *guc);
441 struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
442 int intel_guc_allocate_and_map_vma(struct intel_guc *guc, u32 size,
444 int intel_guc_self_cfg32(struct intel_guc *guc, u16 key, u32 value);
445 int intel_guc_self_cfg64(struct intel_guc *guc, u16 key, u64 value);
447 static inline bool intel_guc_is_supported(struct intel_guc *guc)
449 	return intel_uc_fw_is_supported(&guc->fw);
452 static inline bool intel_guc_is_wanted(struct intel_guc *guc)
454 	return intel_uc_fw_is_enabled(&guc->fw);
457 static inline bool intel_guc_is_used(struct intel_guc *guc)
459 	GEM_BUG_ON(__intel_uc_fw_status(&guc->fw) == INTEL_UC_FIRMWARE_SELECTED);
460 	return intel_uc_fw_is_available(&guc->fw);
463 static inline bool intel_guc_is_fw_running(struct intel_guc *guc)
465 	return intel_uc_fw_is_running(&guc->fw);
468 static inline bool intel_guc_is_ready(struct intel_guc *guc)
470 	return intel_guc_is_fw_running(guc) && intel_guc_ct_enabled(&guc->ct);
473 static inline void intel_guc_reset_interrupts(struct intel_guc *guc)
475 	guc->interrupts.reset(guc);
478 static inline void intel_guc_enable_interrupts(struct intel_guc *guc)
480 	guc->interrupts.enable(guc);
483 static inline void intel_guc_disable_interrupts(struct intel_guc *guc)
485 	guc->interrupts.disable(guc);
488 static inline int intel_guc_sanitize(struct intel_guc *guc)
490 	intel_uc_fw_sanitize(&guc->fw);
491 	intel_guc_disable_interrupts(guc);
492 	intel_guc_ct_sanitize(&guc->ct);
493 	guc->mmio_msg = 0;
498 static inline void intel_guc_enable_msg(struct intel_guc *guc, u32 mask)
500 	spin_lock_irq(&guc->irq_lock);
501 	guc->msg_enabled_mask |= mask;
502 	spin_unlock_irq(&guc->irq_lock);
505 static inline void intel_guc_disable_msg(struct intel_guc *guc, u32 mask)
507 	spin_lock_irq(&guc->irq_lock);
508 	guc->msg_enabled_mask &= ~mask;
509 	spin_unlock_irq(&guc->irq_lock);
512 int intel_guc_wait_for_idle(struct intel_guc *guc, long timeout);
514 int intel_guc_deregister_done_process_msg(struct intel_guc *guc,
516 int intel_guc_sched_done_process_msg(struct intel_guc *guc,
518 int intel_guc_context_reset_process_msg(struct intel_guc *guc,
520 int intel_guc_engine_failure_process_msg(struct intel_guc *guc,
522 int intel_guc_error_capture_process_msg(struct intel_guc *guc,
524 int intel_guc_crash_process_msg(struct intel_guc *guc, u32 action);
527 intel_guc_lookup_engine(struct intel_guc *guc, u8 guc_class, u8 instance);
531 int intel_guc_global_policies_update(struct intel_guc *guc);
535 void intel_guc_submission_reset_prepare(struct intel_guc *guc);
536 void intel_guc_submission_reset(struct intel_guc *guc, intel_engine_mask_t stalled);
537 void intel_guc_submission_reset_finish(struct intel_guc *guc);
538 void intel_guc_submission_cancel_requests(struct intel_guc *guc);
540 void intel_guc_load_status(struct intel_guc *guc, struct drm_printer *p);
542 void intel_guc_write_barrier(struct intel_guc *guc);
544 void intel_guc_dump_time_info(struct intel_guc *guc, struct drm_printer *p);
546 int intel_guc_sched_disable_gucid_threshold_max(struct intel_guc *guc);
548 bool intel_guc_tlb_invalidation_is_available(struct intel_guc *guc);
549 int intel_guc_invalidate_tlb_engines(struct intel_guc *guc);
550 int intel_guc_invalidate_tlb_guc(struct intel_guc *guc);
551 int intel_guc_tlb_invalidation_done(struct intel_guc *guc,
553 void wake_up_all_tlb_invalidate(struct intel_guc *guc);