i915/gt/intel_workarounds.c

304 wa_masked_en(struct i915_wa_list *wal, i915_reg_t reg, u32 val)
344 	wa_masked_en(wal, INSTPM, INSTPM_FORCE_ORDERING);
350 	wa_masked_en(wal, INSTPM, INSTPM_FORCE_ORDERING);
356 	wa_masked_en(wal, INSTPM, INSTPM_FORCE_ORDERING);
359 	wa_masked_en(wal, RING_MI_MODE(RENDER_RING_BASE), ASYNC_FLIP_PERF_DISABLE);
371 	wa_masked_en(wal, HDC_CHICKEN0,
386 	wa_masked_en(wal, CACHE_MODE_1, GEN8_4x4_STC_OPTIMIZATION_DISABLE);
422 	wa_masked_en(wal, HDC_CHICKEN0,
438 	wa_masked_en(wal, HIZ_CHICKEN, CHV_HZ_8X8_MODE_IN_1X);
452 		wa_masked_en(wal, COMMON_SLICE_CHICKEN2,
472 	wa_masked_en(wal, CACHE_MODE_1,
481 	wa_masked_en(wal, HDC_CHICKEN0,
499 	wa_masked_en(wal, HDC_CHICKEN0,
534 		wa_masked_en(wal, GEN9_WM_CHICKEN3, GEN9_FACTOR_IN_CLR_VAL_HIZ);
594 	wa_masked_en(wal, COMMON_SLICE_CHICKEN2,
607 		wa_masked_en(wal, COMMON_SLICE_CHICKEN2,
621 	wa_masked_en(wal, COMMON_SLICE_CHICKEN2,
631 	wa_masked_en(wal, COMMON_SLICE_CHICKEN2,
710 	wa_masked_en(wal, GEN11_COMMON_SLICE_CHICKEN3,
744 		wa_masked_en(wal, HIZ_CHICKEN, HZ_DEPTH_TEST_LE_GE_OPT_DISABLE);
747 		wa_masked_en(wal, COMMON_SLICE_CHICKEN4, DISABLE_TDC_LOAD_BALANCING_CALC);
761 	wa_masked_en(wal, HIZ_CHICKEN,
781 	wa_masked_en(wal, CACHE_MODE_1, MSAA_OPTIMIZATION_REDUC_DISABLE);
829 	wa_masked_en(wal, CACHE_MODE_1, MSAA_OPTIMIZATION_REDUC_DISABLE);
1042 	wa_masked_en(wal, CACHE_MODE_0, CM0_PIPELINED_RENDER_FLUSH_DISABLE);
1050 	wa_masked_en(wal, _3D_CHICKEN2, _3D_CHICKEN2_WM_READ_PIPELINED);
2383 		wa_masked_en(wal,
2426 		wa_masked_en(wal,
2434 		wa_masked_en(wal,
2479 		wa_masked_en(wal, GEN9_CSFE_CHICKEN1_RCS,
2491 		wa_masked_en(wal,
2551 		wa_masked_en(wal,
2567 		wa_masked_en(wal,
2574 		wa_masked_en(wal,
2607 		wa_masked_en(wal,
2618 		wa_masked_en(wal,
2637 		wa_masked_en(wal,
2645 		wa_masked_en(wal,
2671 			wa_masked_en(wal,
2678 		wa_masked_en(wal,
2690 		wa_masked_en(wal,
2716 		wa_masked_en(wal,
2726 		wa_masked_en(wal,
2731 		wa_masked_en(wal,
2735 		wa_masked_en(wal,
2873 	wa_masked_en(wal, GEN12_RCU_MODE, XEHP_RCU_MODE_FIXED_SLICE_CCS_MODE);
2880 	wa_masked_en(wal, XEHP_CCS_MODE, mode);
2947 		wa_masked_en(wal, VFG_PREEMPTION_CHICKEN, POLYGON_TRIFAN_LINELOOP_DISABLE);
2963 		wa_masked_en(wal, FF_SLICE_CS_CHICKEN2, GEN12_PERF_FIX_BALANCING_CFE_DISABLE);