Lines Matching refs:mmio_base
859 wa_masked_dis(wal, RING_MI_MODE(engine->mmio_base), TGL_NESTED_BB_EN);
875 BLIT_CCTL(engine->mmio_base),
1456 wa_write_or(wal, VDBOX_CGCTL3F10(engine->mmio_base),
1575 wa_write_or(wal, VDBOX_CGCTL3F1C(engine->mmio_base),
1945 RING_CTX_TIMESTAMP(engine->mmio_base),
1989 whitelist_reg_ext(w, _MMIO(0x2000 + engine->mmio_base),
1992 whitelist_reg_ext(w, _MMIO(0x2014 + engine->mmio_base),
1995 whitelist_reg_ext(w, _MMIO(0x23B0 + engine->mmio_base),
2116 const u32 base = engine->mmio_base;
2173 RING_CMD_CCTL(engine->mmio_base),
2655 RING_SEMA_WAIT_POLL(engine->mmio_base),
2660 wa_masked_field_set(wal, ECOSKPD(engine->mmio_base),