i915/gt/intel_rps.c

308 	rps->min_freq = fmax;
425 	val = rps->min_freq + val;
940 	rps->cur_freq = max_t(int, rps->cur_freq + adj, rps->min_freq);
968 	if (val < rps->min_freq || val > rps->max_freq)
1059 	GEM_BUG_ON(val < rps->min_freq);
1112 	caps->min_freq = REG_FIELD_GET(MTL_RPN_CAP_MASK, rp_state_cap);
1124 	/* static values from HW: RP0 > RP1 > RPn (min_freq) */
1128 		caps->min_freq = (rp_state_cap >>  0) & 0xff;
1137 		caps->min_freq = (rp_state_cap >> 16) & 0xff;
1148 		caps->min_freq *= GEN9_FREQ_SCALER;
1178 	rps->min_freq = caps.min_freq;
1197 					rps->min_freq,
1210 	if (rps_set(rps, rps->min_freq, true)) {
1215 	rps->cur_freq = rps->min_freq;
1542 	if (rps->max_freq <= rps->min_freq)
1564 		 rps->min_freq, rps->max_freq,
1565 		 intel_gpu_freq(rps, rps->min_freq),
1570 	GEM_BUG_ON(rps->max_freq < rps->min_freq);
1573 	GEM_BUG_ON(rps->efficient_freq < rps->min_freq);
1708 	rps->min_freq = vlv_rps_min_freq(rps);
1710 		intel_gpu_freq(rps, rps->min_freq), rps->min_freq);
1742 	rps->min_freq = chv_rps_min_freq(rps);
1744 		intel_gpu_freq(rps, rps->min_freq), rps->min_freq);
1752 				   rps->rp1_freq | rps->min_freq) & 1,
2004 	rps->min_freq_softlimit = rps->min_freq;
2005 	rps_to_gt(rps)->defaults.min_freq = rps->min_freq_softlimit;
2029 	rps->idle_freq = rps->min_freq;
2243 		return slpc->min_freq;
2245 		return intel_gpu_freq(rps, rps->min_freq);
2387 		   intel_gpu_freq(rps, caps.min_freq));
2401 		   intel_gpu_freq(rps, rps->min_freq));
2427 		   intel_gpu_freq(rps, caps.min_freq));
2463 	if (val < rps->min_freq ||
2526 		return DIV_ROUND_CLOSEST(slpc->min_freq,
2529 		freq = rps->min_freq;
2545 	if (val < rps->min_freq ||
2681 				   ((caps.min_freq <<
2686 		intel_rps_set(rps, rps->min_freq);
2843 	if (rps->max_freq_softlimit > rps->min_freq)
2892 	rps->max_freq_softlimit = rps->min_freq;
2893 	ret = !__gen5_rps_set(&to_gt(i915)->rps, rps->min_freq);